| 國立交通大學 |
2014-12-08T15:42:28Z |
Design of instruction address queue for high degree x86 superscalar architectures
|
Chiu, JC; Wang, MJY; Chung, CP |
| 國立交通大學 |
2014-12-08T15:42:04Z |
Posting file partitioning and parallel information retrieval
|
Ma, YC; Chen, TF; Chung, CP |
| 國立交通大學 |
2014-12-08T15:42:02Z |
An analytical POC stack operations folding for continuous and discontinuous Java bytecodes
|
Ton, LR; Chang, LC; Chung, CP |
| 國立交通大學 |
2014-12-08T15:41:45Z |
Design of an optimal folding mechanism for Java processors
|
Ton, LR; Chang, LC; Shann, JJ; Chung, CP |
| 國立交通大學 |
2014-12-08T15:41:27Z |
Inverted file compression through document identifier reassignment
|
Shieh, WY; Chen, TF; Shann, JJJ; Chung, CP |
| 國立交通大學 |
2014-12-08T15:40:53Z |
Variable-size data item placement for load and storage balancing
|
Ma, YC; Chiu, JC; Chen, TF; Chung, CP |
| 國立交通大學 |
2014-12-08T15:40:52Z |
3-disjoint gamma interconnection networks
|
Chen, CW; Lu, NP; Chung, CP |
| 國立交通大學 |
2014-12-08T15:40:44Z |
An inverted file cache for fast information retrieval
|
Shieh, WY; Shann, JJJ; Chung, CP |
| 國立交通大學 |
2014-12-08T15:38:46Z |
A software/hardware cooperated stack operations folding model for Java processors
|
Ton, LR; Chang, LC; Shann, JJ; Chung, CP |
| 國立交通大學 |
2014-12-08T15:37:20Z |
Branch-and-bound task allocation with task clustering-based pruning
|
Ma, YC; Chen, TF; Chung, CP |
| 國立交通大學 |
2014-12-08T15:27:59Z |
ANALYZING CACHE PERFORMANCE ON MULTI-STREAM EXECUTION PROCESSOR
|
LIN, CZ; TSENG, CC; CHUNG, CP |
| 國立交通大學 |
2014-12-08T15:27:37Z |
Register renaming for x86 superscalar design
|
Liu, CC; Shiu, RM; Chung, CP |
| 國立交通大學 |
2014-12-08T15:27:30Z |
Instruction cache prefetching with extended BTB
|
Chi, SA; Shiu, RM; Chiu, JC; Chang, SE; Chung, CP |
| 國立交通大學 |
2014-12-08T15:27:25Z |
Instruction folding in Java processor
|
Ton, LR; Chang, LC; Rao, MF; Tseng, HM; Shang, SS; Ma, RL; Wang, DC; Chung, CP |
| 國立交通大學 |
2014-12-08T15:27:03Z |
Design of instruction stream buffer with trace support for x86 processors
|
Chiu, JC; Huang, IH; Chung, CP |
| 國立交通大學 |
2014-12-08T15:26:35Z |
Code compression by register operand dependency
|
Lin, K; Shann, JJJ; Chung, CP |
| 國立交通大學 |
2014-12-08T15:26:14Z |
A statistics-based approach to incrementally update inverted files
|
Shieh, WY; Chung, CP |
| 國立交通大學 |
2014-12-08T15:26:14Z |
A tree-based inverted file for fast ranked-document retrieval
|
Shieh, WY; Chen, TF; Chung, CP |
| 國立交通大學 |
2014-12-08T15:25:51Z |
A unique-order interpolative code for fast querying and space-efficient indexing in information retrieval systems
|
Cheng, CS; Shann, JJJ; Chung, CP |
| 國立交通大學 |
2014-12-08T15:25:38Z |
Low-power BIBITS encoding with register relabeling for instruction bus
|
Cheng, CT; Chiao, WH; Shann, JJJ; Chung, CP; Chen, WF |
| 國立交通大學 |
2014-12-08T15:25:28Z |
Low-power data address bus encoding method
|
Weng, TH; Chiao, WH; Shann, JJJ; Chung, CP; Lu, J |
| 國立交通大學 |
2014-12-08T15:25:28Z |
Low-power branch prediction
|
Hu, YC; Chiao, WH; Shann, JJJ; Chung, CP; Chen, WF |
| 國立交通大學 |
2014-12-08T15:19:35Z |
A statistics-based approach to incrementally update inverted files
|
Shieh, WY; Chung, CP |
| 國立交通大學 |
2014-12-08T15:18:20Z |
Designing a disjoint paths interconnection network with fault tolerance and collision solving
|
Chen, CW; Chung, CP |
| 國立交通大學 |
2014-12-08T15:17:20Z |
Unique-order interpolative coding for fast querying and space-efficient indexing in information retrieval systems
|
Cheng, CS; Shann, JJJ; Chung, CP |
