臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T15:26:16Z	DR Scan: DR-scan: A Test Methodology for Dual-rail Asynchronous Circuit	Shih-An. Hsieh;Y.-H.Wang;K.Y. Huang;James C.M Li; Shih-An. Hsieh; Y.-H.Wang; K.Y. Huang; James C.M Li; CHIEN-MO LI
臺大學術典藏	2018-09-10T15:26:16Z	DR Scan: DR-scan: A Test Methodology for Dual-rail Asynchronous Circuit	Shih-An. Hsieh;Y.-H.Wang;K.Y. Huang;James C.M Li; Shih-An. Hsieh; Y.-H.Wang; K.Y. Huang; James C.M Li; CHIEN-MO LI
臺大學術典藏	2018-09-10T07:09:33Z	Diagnosis of Multiple Scan Chain Timing Faults	W.S. Chuang;James C.-M. Li; W.S. Chuang; James C.-M. Li; CHIEN-MO LI
臺大學術典藏	2018-09-10T07:09:33Z	Diagnosis of Multiple Scan Chain Timing Faults	W.S. Chuang;James C.-M. Li; W.S. Chuang; James C.-M. Li; CHIEN-MO LI
臺大學術典藏	2018-09-10T07:09:33Z	On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using A Hybrid Single-Capture Scheme for Testing Scan Designs	Shianling Wu; Laung-Terng Wang; Zhigang Jiang; Jiayong Song; Boryau Sheu; Xiaoqing Wen; James C.-M. Li; Jiun-Lang Huang; Ravi Apte; CHIEN-MO LI
臺大學術典藏	2018-09-10T06:37:54Z	Design and Chip Implementation of the Segment Weighted Random BIST for Low Power Testing	Chun-Yi Lee; James C.-M. Li; CHIEN-MO LI
臺大學術典藏	2018-09-10T06:37:54Z	Response Inversion Scan Cell (RISC): A Peak Capture Power Reduction Technique	Shyue-Tsong Shen; James C.-M. Li; CHIEN-MO LI; Bin-Chuan Bai; B.-H. Chen; Wei-Chuang Kao
臺大學術典藏	2005-01	A Two-level Test Data Compression and Test Time Reduction Technique for SOC	Yu-Te Liaw; James C.-M. Li; CHIEN-MO LI

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