English  |  正體中文  |  简体中文  |  总笔数 :0  
造访人次 :  52183661    在线人数 :  724
教育部委托研究计画      计画执行:国立台湾大学图书馆
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
关于TAIR

浏览

消息

著作权

相关连结

"k t cheng"的相关文件

回到依作者浏览
依题名排序 依日期排序

显示项目 1-10 / 18 (共2页)
1 2 > >>
每页显示[10|25|50]项目

机构 日期 题名 作者
臺大學術典藏 2018-09-10T15:26:16Z Design, automation, and test for low-power and reliable flexible electronics T.-C. Huang;J.-L. Huang;K.-T. Cheng; T.-C. Huang; J.-L. Huang; K.-T. Cheng; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T08:47:21Z Robust Circuit Design for Flexible Electronics T.-C Huang; J.-L. Huang; K.-T. Cheng; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T07:42:21Z Solving Constraint Satisfiability Problem for Automatic Generation of Design Verification Vectors R.C.-Y. Huang; K.-T. Cheng; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T07:42:21Z Electronic Design Automation: Synthesis, Verification, and Test L-T. Wang;K-T. Cheng;Y-W. Chang;C-Y. Huang;et. al.; L-T. Wang; K-T. Cheng; Y-W. Chang; C-Y. Huang; et. al.; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T07:08:52Z Libra - A Library-Independent Framework for Post-Layout Performance Optimization R.C.-Y. Huang; Y. Wang; K.-T. Cheng; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T07:08:52Z A New Extended Finite State Machine (EFSM) Model for RTL Design Verification R.C.-Y. Huang; K.-T. Cheng; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T04:35:41Z A Circuit SAT Solver with Signal Correlation Guided Learning Feng Lu; Li-C. Wang; K-T. Cheng,; Ric C-Y. Huang; CHUNG-YANG HUANG
臺大學術典藏 2018-09-10T04:15:41Z Testing Second-Order Delta-Sigma Modulators using Pseudo-Random Patterns C. K. Ong; J. L. Huang; K. T. Cheng; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T04:15:41Z On-Chip Analog Response Extraction with 1-Bit Sigma-Delta Modulators H. C. Hong; J. L. Huang; K. T. Cheng; C. W. Wu; JIUN-LANG HUANG
臺大學術典藏 2018-09-10T03:50:56Z An on-chip short-time interval measurement technique for testing high-speed communication links J.L. Huang; K.T. Cheng; JIUN-LANG HUANG

显示项目 1-10 / 18 (共2页)
1 2 > >>
每页显示[10|25|50]项目