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"kuo t w"的相關文件
顯示項目 76-85 / 270 (共27頁)
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| 臺大學術典藏 |
2018-09-10T15:32:50Z |
Introduction to the special issue on smart reconfigurable system modeling, design, and implementation
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Hsiung, P.-A.; Chang, Y.-H.; Huang, C.-H.; Kuo, T.-W.; Hsiung, P.-A.; Chang, Y.-H.; Huang, C.-H.; Kuo, T.-W.; TEI-WEI KUO |
| 臺大學術典藏 |
2018-09-10T15:22:32Z |
Marching-based wear-leveling for PCM-based storage systems
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Chang, H.-S.;Chang, Y.-H.;Hsiu, P.-C.;Kuo, T.-W.;Li, H.-P.; Chang, H.-S.; Chang, Y.-H.; Hsiu, P.-C.; Kuo, T.-W.; Li, H.-P.; TEI-WEI KUO |
| 臺大學術典藏 |
2018-09-10T15:22:32Z |
How to improve the space utilization of dedup-based PCM storage devices?
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Lin, C.-T.;Chang, Y.-H.;Kuo, T.-W.;Chang, H.-S.;Li, H.-P.; Lin, C.-T.; Chang, Y.-H.; Kuo, T.-W.; Chang, H.-S.; Li, H.-P.; TEI-WEI KUO |
| 臺大學術典藏 |
2018-09-10T15:22:32Z |
Achieving SLC performance with MLC flash memory
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Chang, Y.-M.;Chang, Y.-H.;Kuo, T.-W.;Li, Y.-C.;Li, H.-P.; Chang, Y.-M.; Chang, Y.-H.; Kuo, T.-W.; Li, Y.-C.; Li, H.-P.; TEI-WEI KUO |
| 臺大學術典藏 |
2018-09-10T15:22:31Z |
Virtual flash chIPs: Rethinking the layer design of flash devices to improve data recoverability
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Yang, M.-C.;Chang, Y.-H.;Kuo, T.-W.; Yang, M.-C.; Chang, Y.-H.; Kuo, T.-W.; TEI-WEI KUO |
| 臺大學術典藏 |
2018-09-10T15:22:31Z |
Rethinking I/O request management over eMMC-based solid-state drives
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Tsao, C.-W.;Liu, C.-Y.;Ho, C.-C.;Wang, T.-Y.;Huang, P.-C.;Chang, Y.-H.;Kuo, T.-W.; Tsao, C.-W.; Liu, C.-Y.; Ho, C.-C.; Wang, T.-Y.; Huang, P.-C.; Chang, Y.-H.; Kuo, T.-W.; TEI-WEI KUO |
| 臺大學術典藏 |
2018-09-10T15:22:31Z |
Reliability-aware striping with minimized performance overheads for flash-based storage devices
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Yang, M.-C.;Chang, Y.-M.;Huang, P.-C.;Chang, Y.-H.;Lee, L.-J.;Kuo, T.-W.; Yang, M.-C.; Chang, Y.-M.; Huang, P.-C.; Chang, Y.-H.; Lee, L.-J.; Kuo, T.-W.; TEI-WEI KUO |
| 臺大學術典藏 |
2018-09-10T15:22:31Z |
Real-time task scheduling on island-based multi-core platforms
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Chang, C.-W.;Chen, J.-J.;Kuo, T.-W.;Falk, H.; Chang, C.-W.; Chen, J.-J.; Kuo, T.-W.; Falk, H.; TEI-WEI KUO |
| 臺大學術典藏 |
2018-09-10T14:58:37Z |
The acceleration of pipeline workloads under the FPGA area and bandwidth constraints
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Huang, W.-N.;Cheng, S.-W.;Chang, C.-W.;Wu, Y.-C.;Kuo, T.-W.;Hsu, Y.-C.;Tseng, W.-Y.I.;Hung, S.-H.; Huang, W.-N.; Cheng, S.-W.; Chang, C.-W.; Wu, Y.-C.; Kuo, T.-W.; Hsu, Y.-C.; Tseng, W.-Y.I.; Hung, S.-H.; TEI-WEI KUO; SHIH-HAO HUNG |
| 臺大學術典藏 |
2018-09-10T14:57:12Z |
A PCM translation layer for integrated memory and storage management
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Chang, B.-J.;Chang, Y.-H.;Chang, H.-S.;Kuo, T.-W.;Li, H.-P.; Chang, B.-J.; Chang, Y.-H.; Chang, H.-S.; Kuo, T.-W.; Li, H.-P.; TEI-WEI KUO |
顯示項目 76-85 / 270 (共27頁)
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