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Showing items 1-17 of 17 (1 Page(s) Totally)
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| 臺大學術典藏 |
2020-06-11T06:29:43Z |
Design strategy for three-dimensional subband filter banks.
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Wu, Po-Cheng;Chen, Liang-Gee;Lai, Yeong-Kang;Tsai, Tsung-Han; Wu, Po-Cheng; Chen, Liang-Gee; Lai, Yeong-Kang; Tsai, Tsung-Han; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T06:20:28Z |
Flexible data-interlacing architecture for full-search block-matching algorithm
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Lai, Yeong-Kang; Chen, Liang-Gee; Lee, Yung-Pin; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T06:20:28Z |
Efficient array architecture with data-rings for 3-step hierarchical search block matching algorithm
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Lai, Yeong-Kang; Chen, Liang-Gee; Shen, Jun-Fu; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T06:20:27Z |
Hardware efficient design of filter banks for video coding
|
Wu, Po-Cheng; Chen, Liang-Gee; Liu, Yuan-Chen; Lai, Yeong-Kang; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T06:20:26Z |
True color video signal processing system and its real-time chip implementation
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Liu, Yuan-Chen; Chen, Liang-Gee; Wu, Po-Cheng; Lai, Yeong-Kang; Tsai, Tsung-Han; Lee, Yung-Pin; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:35Z |
Novel video signal processor with reconfigurable pipelined architecture
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Lai, Yeong-Kang;Chen, Liang-Gee;Chiang, Ming-Cheng; Lai, Yeong-Kang; Chen, Liang-Gee; Chiang, Ming-Cheng; LIANG-GEE CHEN |
| 臺大學術典藏 |
2018-09-10T05:50:35Z |
Novel video signal processor with programmable data arrangement and efficient memory configuration
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Lai, Yeong-Kang; Chen, Liang-Gee; LIANG-GEE CHEN |
| 國立臺灣大學 |
1997-07 |
A flexible data-interlacing architecture for full-search block-matching algorithm
|
Lai, Yeong-Kang; Chen, Liang-Gee; Lee, Yung-Pin |
| 臺大學術典藏 |
1997-07 |
A flexible data-interlacing architecture for full-search block-matching algorithm
|
Lai, Yeong-Kang; Chen, Liang-Gee; Lee, Yung-Pin; Lai, Yeong-Kang; Chen, Liang-Gee; Lee, Yung-Pin |
| 國立臺灣大學 |
1997-06 |
Hardware efficient design of filter banks for video coding
|
Wu, Po-Cheng; Chen, Liang-Gee; Liu, Yuan-Chen; Lai, Yeong-Kang |
| 國立臺灣大學 |
1997-06 |
An efficient array architecture with data-rings for 3-step hierarchical search block matching algorithm
|
Lai, Yeong-Kang; Chen, Liang-Gee; Shen, Jun-Fu |
| 國立臺灣大學 |
1997-06 |
A novel scalable architecture with memory interleaving organization for full search block-matching algorithm
|
Lai, Yeong-Kang; Chen, Liang-Gee; Tsai, Tsung-Han; Wu, Po-Cheng |
| 臺大學術典藏 |
1997-06 |
A novel scalable architecture with memory interleaving organization for full search block-matching algorithm
|
Lai, Yeong-Kang; Chen, Liang-Gee; Tsai, Tsung-Han; Wu, Po-Cheng; Lai, Yeong-Kang; Chen, Liang-Gee; Tsai, Tsung-Han; Wu, Po-Cheng |
| 國立臺灣大學 |
1996-09 |
Design strategy for three-dimensional subband filter banks
|
Wu, Po-Cheng; Chen, Liang-Gee; Lai, Yeong-Kang; Tsai, Tsung-Han |
| 臺大學術典藏 |
1996-09 |
Design strategy for three-dimensional subband filter banks
|
Wu, Po-Cheng; Chen, Liang-Gee; Lai, Yeong-Kang; Tsai, Tsung-Han; Wu, Po-Cheng; Chen, Liang-Gee; Lai, Yeong-Kang; Tsai, Tsung-Han |
| 國立臺灣大學 |
1996-05 |
A novel video signal processor with reconfigurable pipelined architecture
|
Lai, Yeong-Kang; Chen, Liang-Gee; Chiang, Ming-Cheng |
| 臺大學術典藏 |
1996-05 |
A novel video signal processor with reconfigurable pipelined architecture
|
Lai, Yeong-Kang; Chen, Liang-Gee; Chiang, Ming-Cheng; Lai, Yeong-Kang; Chen, Liang-Gee; Chiang, Ming-Cheng |
Showing items 1-17 of 17 (1 Page(s) Totally)
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