臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Showing items 6-15 of 70 (7 Page(s) Totally)
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Institution	Date	Title	Author
國立臺灣科技大學	2019	Resistive open defect detection in SoCs by a test method based on injected charge volume after test input application	Matsumoto, Y.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K.
國立臺灣科技大學	2019	Stand-by mode test method of interconnects between dies in 3d ICs with IEEE 1149.1 test circuits	Kanda, M.;Yabui, D.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K.
國立臺灣科技大學	2019	Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM	Lu, S.-K.;Huang, Huang H.-K.;Hsu, C.-L.;Sun, C.-T.;Miyase, K.
國立臺灣科技大學	2019	A fault-tolerant MPSoC for CubeSats	Fuchs, C.M.;Chou, P.;Wen, X.;Murillo, N.M.;Furano, G.;Holst, S.;Tavoularis, A.;Lu, S.-K.;Plaat, A.;Marinis, K.
國立臺灣科技大學	2019	A static method for analyzing hotspot distribution on the LSI	Miyase, K.;Kawano, Y.;Lu, S.-K.;Wen, X.;Kajihara, S.
國立臺灣科技大學	2018	A design for testability of open defects at interconnects in 3D stacked ICs	Ashikin F.; Hashizume M.; Yotsuyanagi H.; Lu S.-K.; Roth Z.
國立臺灣科技大學	2018	Address Remapping Techniques for Enhancing Fabrication Yield of Embedded Memories	Lu S.-K.; Jheng H.-C.; Lin H.-W.; Hashizume M.
國立臺灣科技大學	2018	Fault Leveling Techniques for Yield and Reliability Enhancement of NAND Flash Memories	Lu S.-K.; Zhong S.-X.; Hashizume M.
國立臺灣科技大學	2018	A defective level monitor of open defects in 3D ICs with a comparator of offset cancellation type	Kanda, M.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K.
國立臺灣科技大學	2018	A defect level monitor of resistive open defect at interconnects in 3D ICs by injected charge volume	Ohtani, K.;Osato, N.;Hashizume, M.;Yotsuyanagi, H.;Lu, S.-K.

Showing items 6-15 of 70 (7 Page(s) Totally)
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