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機構 日期 題名 作者
臺大學術典藏 2018-09-10T08:19:11Z A Delta-Sigma Pulse-Width Digitization Technique for Super-Regenerative Receivers Y.-H. Liu;T.-H. Lin; Y.-H. Liu; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T08:19:11Z A 1-V Low-Noise Readout Front-End for Biomedical Applications in 0.18-μm CMOS C.-J. Chou;B.-J. Kuo;T.-H. Lin; C.-J. Chou; B.-J. Kuo; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T08:19:11Z A 400-MHz Super-Regenerative Receiver with a Fast Digital Frequency Calibration H.-H. Liu;C.-J. Tung;Y.-H. Liu;T.-H. Lin; H.-H. Liu; C.-J. Tung; Y.-H. Liu; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T08:19:11Z A 5-GHz Relative-Phase Cancellation Fractional-N Phase-Locked Loops in 0.13-μm CMOS W.-H. Chiu;C.-Y. Cheng;T.-H. Lin; W.-H. Chiu; C.-Y. Cheng; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T08:19:11Z Dual-mode Continuous-Time Quadrature Bandpass ΔΣ modulator with Pseudo-random Quadrature mismatch shaping algorithm for Low-IF receiver application C.-Y. Ho;Y.-Y. Lin;T.-H. Lin; C.-Y. Ho; Y.-Y. Lin; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T08:19:11Z 1.4μW/channel 16-channel EEG/ECoG Processor for Smart Brain Sensor SoC T.-C. Chen;T.-H. Lee;Y.-H. Chen;T.-C. Ma;T.-D. Chuang;C.-J. Chou;C.-H. Yang;T.-H. Lin;L.-G. Chen; T.-C. Chen; T.-H. Lee; Y.-H. Chen; T.-C. Ma; T.-D. Chuang; C.-J. Chou; C.-H. Yang; T.-H. Lin; L.-G. Chen; LIANG-GEE CHEN; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T07:43:10Z A Super-Regenerative ASK Receiver with Delta-Sigma Pulse-width Digitizer and SAR-based Fast Frequency Calibration for MICS Applications Y.-H. Liu;H.-H. Liu;T.-H. Lin; Y.-H. Liu; H.-H. Liu; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T07:43:10Z A 5GHz Phase-Locked Loop Using Dynamic Phase-Error Compensation Technique for Fast Settling in 0.18-μm CMOS W.-H. Chiu;Y.-H. Huang;T.-H. Lin; W.-H. Chiu; Y.-H. Huang; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T07:43:10Z A Time-Domain-Based Self-Calibrated Analog-to-Digital Converter With A Linear Voltage-to-Delay Circuit in 0.18-μm CMOS C.-H. Yang;W.-H. Chiu;T.-H. Lin; C.-H. Yang; W.-H. Chiu; T.-H. Lin; TSUNG-HSIEN LIN
臺大學術典藏 2018-09-10T07:43:10Z A charge pump current missmatch calibration technique for ΔΣ fractional-N PLLs in 0.18-μm CMOS W.-H. Chiu;T.-S. Chang;T.-H. Lin; W.-H. Chiu; T.-S. Chang; T.-H. Lin; TSUNG-HSIEN LIN

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