臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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Showing items 21-30 of 81 (9 Page(s) Totally)
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Institution	Date	Title	Author
臺大學術典藏	2020-10-07T01:23:16Z	Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET	M.-L. Fan; VITA PI-HO HU; C.-T. Chuang; P. Su; Y.-N. Chen; M.-L. Fan;V. P.-H. Hu;Y.-N. Chen;P. Su;C.-T. Chuang; M.-L. Fan; V. P.-H. Hu; V. P.-H. Hu; Y.-N. Chen; P. Su; C.-T. Chuang; 胡璧合; VITA PI-HO HU
臺大學術典藏	2020-10-07T01:23:16Z	Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET	M.-L. Fan; VITA PI-HO HU; C.-T. Chuang; P. Su; Y.-N. Chen; M.-L. Fan;V. P.-H. Hu;Y.-N. Chen;P. Su;C.-T. Chuang; M.-L. Fan; V. P.-H. Hu; V. P.-H. Hu; Y.-N. Chen; P. Su; C.-T. Chuang; 胡璧合; VITA PI-HO HU
臺大學術典藏	2020-10-07T01:23:16Z	Design and Analysis of Robust Tunneling FET SRAM	C.-T. Chuang; V. P.-H. Hu; P. Su; Y.-N. Chen; M.-L. Fan; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;P. Su;C.-T. Chuang; Y.-N. Chen; M.-L. Fan; V. P.-H. Hu; P. Su; C.-T. Chuang; VITA PI-HO HU; 胡璧合; VITA PI-HO HU
臺大學術典藏	2020-10-07T01:23:16Z	Design and Analysis of Robust Tunneling FET SRAM	C.-T. Chuang; V. P.-H. Hu; P. Su; Y.-N. Chen; M.-L. Fan; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;P. Su;C.-T. Chuang; Y.-N. Chen; M.-L. Fan; V. P.-H. Hu; P. Su; C.-T. Chuang; VITA PI-HO HU; 胡璧合; VITA PI-HO HU
臺大學術典藏	2020-10-07T01:23:16Z	Design and Analysis of Robust Tunneling FET SRAM	C.-T. Chuang; V. P.-H. Hu; P. Su; Y.-N. Chen; M.-L. Fan; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;P. Su;C.-T. Chuang; Y.-N. Chen; M.-L. Fan; V. P.-H. Hu; P. Su; C.-T. Chuang; VITA PI-HO HU; 胡璧合; VITA PI-HO HU
臺大學術典藏	2020-10-07T01:23:15Z	Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices	VITA PI-HO HU; 胡璧合; C.-T. Chuang; Pin Su; V. P.-H. Hu; M.-L. Fan; Y.-N. Chen; VITA PI-HO HU; Pin Su; C.-T. Chuang; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;Pin Su;C.-T. Chuang; Y.-N. Chen; M.-L. Fan; V. P.-H. Hu
臺大學術典藏	2020-10-07T01:23:15Z	Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices	VITA PI-HO HU; 胡璧合; C.-T. Chuang; Pin Su; V. P.-H. Hu; M.-L. Fan; Y.-N. Chen; VITA PI-HO HU; Pin Su; C.-T. Chuang; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;Pin Su;C.-T. Chuang; Y.-N. Chen; M.-L. Fan; V. P.-H. Hu
臺大學術典藏	2020-10-07T01:23:15Z	Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices	VITA PI-HO HU; 胡璧合; C.-T. Chuang; Pin Su; V. P.-H. Hu; M.-L. Fan; Y.-N. Chen; VITA PI-HO HU; Pin Su; C.-T. Chuang; Y.-N. Chen;M.-L. Fan;V. P.-H. Hu;Pin Su;C.-T. Chuang; Y.-N. Chen; M.-L. Fan; V. P.-H. Hu
臺大學術典藏	2020-10-07T01:23:15Z	Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling	胡璧合; VITA PI-HO HU; C.-T. Chuang; M.-L. Fan;V. P.-H. Hu;Y.-N. Chen;P. Su;C.-T. Chuang; M.-L. Fan; V. P.-H. Hu; Y.-N. Chen; P. Su; C.-T. Chuang; VITA PI-HO HU; M.-L. Fan; V. P.-H. Hu; Y.-N. Chen; P. Su
臺大學術典藏	2020-10-07T01:23:15Z	Stability and Performance Optimization of Heterochannel Monolithic 3-D SRAM Cells Considering Interlayer Coupling	胡璧合; VITA PI-HO HU; C.-T. Chuang; M.-L. Fan;V. P.-H. Hu;Y.-N. Chen;P. Su;C.-T. Chuang; M.-L. Fan; V. P.-H. Hu; Y.-N. Chen; P. Su; C.-T. Chuang; VITA PI-HO HU; M.-L. Fan; V. P.-H. Hu; Y.-N. Chen; P. Su

Showing items 21-30 of 81 (9 Page(s) Totally)
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View [10|25|50] records per page