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Showing items 1-14 of 14 (1 Page(s) Totally)
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| 朝陽科技大學 |
2016-12 |
從造形創作到邏輯思考與空間掌握—Soma cube積木活動的經驗省思
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李其瑋；黃格崇；楊青原; Lee, Chi-Wei;Huang, Jalin K.;Yang, Ching-Yuan |
| 國立交通大學 |
2014-12-12T01:52:14Z |
在HappyGO上應用模擬棋局平衡
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楊景元; Yang, Ching-Yuan; 吳毅成; Wu, I-Chen |
| 國立成功大學 |
2013-02-07 |
保麗龍與泥岩對提升控制性低強度回填材料再開挖性之研究
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楊慶元; Yang, Ching-Yuan |
| 淡江大學 |
2006-02-21 |
Digital adjustable chip oscillator
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Chang, Chia-yang; Chen, Po-chang; Lee, Yang-han; Yang, Ching-yuan |
| 淡江大學 |
2004-02-21 |
數位可調式晶片振盪器
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張佳陽; Chang, Chia-yang; 陳柏璋; Chen, Po-chang; 李揚漢; Lee, Yang-han; 楊清淵; Yang, Ching-yuan |
| 國立臺灣大學 |
2002 |
A wide-range delay-locked loop with a fixed latency of one clock cycle
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Chang, Hsiang-Hui; Lin, Jyh-Woei; Yang, Ching-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2001 |
A one-wire approach for skew compensating clock distribution based on bidirectional techniques
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Yang, Ching-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2001 |
Low-Voltage CMOS Frequency Synthesizer for ERMES Pager Application
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Hsu, June-Ming; Dehng, Guang-Kaai; Yang, Ching-Yuan; Yang, Chu-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
A 900-MHz/1-V CMOS frequency synthesizer
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Dehng, Guang-Kaai; Yang, Ching-Yuan; Hsu, June-Ming; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
Clock-deskew buffer using a SAR-controlled delay-locked loop
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Dehng, Guang-Kaai; Hsu, June-Ming; Yang, Ching-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
2000 |
Fast-switching frequency synthesizer with a discriminator-aided phase detector
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Yang, Ching-Yuan; Liu, Shen-Iuan |
| 國立臺灣大學 |
1997-09 |
High-speed divide-by-4/5 counter for a dual-modulus prescaler
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Yang, Ching-Yuan; Dehng, Guang-Kaai; Liu, Shen-Iuan |
| 國立臺灣大學 |
1996-12 |
Higher-order immittance function synthesis using CCIIIs
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Liu, Shen-Iuan; Yang, Ching-Yuan |
| 台灣神學院 |
1989 |
長老的職責: 檢討台灣基督長老教會
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楊清源; Yang, Ching-Yuan |
Showing items 1-14 of 14 (1 Page(s) Totally)
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