| 臺大學術典藏 |
2018-09-10T05:17:57Z |
Area dependence of the surface tension of a Lennard-Jones fluid from molecular dynamics simulations
|
Chen, L.-J.; LI-JEN CHEN |
| 臺大學術典藏 |
2018-09-10T08:36:18Z |
Area dependent deep depletion behavior in the capacitance-voltage characteristics of metal-oxide-semiconductor structures with ultra-thin oxides
|
Chen, K.-M.;Hwu, J.-G.; Chen, K.-M.; Hwu, J.-G.; JENN-GWO HWU |
| 臺大學術典藏 |
2021-03-29T08:36:42Z |
Area Deprivation and Inequalities in Health and Health Care Outcomes
|
Singh, Gopal K;Ching-Ching Claire Lin;; Singh, Gopal K; CHING-CHING CLAIRE LIN |
| 中國醫藥大學 |
2008-06-08 |
Area Deprivation, Parents’ Socioeconomic Position and New Female Immigrant Children Health Status in Taiwan
|
(Yia-Wun Liang); (Lin Yu-Hsiu); 李卓倫(JwoLeun Lee); 龍紀萱(Chi-Hsuan Lung); (William Pearson); (Yia-Wun Liang) |
| 國立臺灣大學 |
2003 |
Area Deprivation, Socioeconomic Status, and Smoking Behavior among Male Adults in Taiwan
|
李宜家; 林慧淳; 江東亮; LEE, YI-CHIA; LIN, HUEY-CHWEN; CHIANG, TUNG-LIANG |
| 臺大學術典藏 |
2018-09-10T04:36:23Z |
Area deprivation, socioeconomic status, and smoking behavior among male adults in Taiwan
|
Lee, I.-C.;Lin, H.-C.;Chiang, T.-L.; TUNG-LIANG CHIANG |
| 臺大學術典藏 |
2022-06-13T07:28:48Z |
Area deprivation, socioeconomic status, and smoking behavior among male adults in Taiwan
|
李宜家; 林慧淳; 江東亮; Lee I.-C.; Lin H.-C.; TUNG-LIANG CHIANG |
| 國家衛生研究院 |
2014-08 |
Area disparity in children's perceptions of access to tobacco and cigarette purchasing experiences in Taiwan
|
Lee, H;Hsu, CC;Chen, FL;Yen, YY;Lin, PL;Chiu, YW;Lee, CH;Peng, WD;Chen, T;Lu, DL;Huang, HL |
| 美和科技大學 |
2014 |
Area Disparity in Children’s Perceptions of Access to Tobacco and Cigarette Purchasing Experiences in Taiwan
|
HENG LEE;CHIH-CHENG HSU;FU-LI CHEN;YEA-YIN YEN;PI-LI LIN;YU-WEN CHIU;CHIEN-HUNG LEE;WU-DER PENG;TED CHEN;DI-LIN LU;HSIAO-LING HUANG |
| 臺大學術典藏 |
2004-07 |
Area efficient architecture for the embedded block coding in JPEG 2000
|
Chang, Yu-Wei; Fang, Hung-Chi; Chen, Chun-Chia; Chen, Liang-Gee; Chang, Yu-wei; Fang, Hung-chi; Chen, Chun-chia; Chen, Liang-gee |
| 國立臺灣大學 |
2004-07 |
Area efficient architecture for the embedded block coding in JPEG 2000
|
Fang, Hung-Chi; Chang, Yu-Wei; Chen, Liang-Gee |
| 臺大學術典藏 |
2006 |
Area efficient architecture for the embedded block coding in JPEG 2000
|
Chang, Y.-W.; Fang, H.-C.; Chen, C.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立成功大學 |
2021-03 |
Area Efficient High-Performance Digitally Controlled Power Management Unit
|
Liu;Chih-Wei;Chang-Chien;Le-Ren |
| 建國科技大學 |
2008-12 |
Area Efficient Programmable Self Check Reed Solomon Encoder by Using Constant Finite Field Multiplier
|
吳章銘, ;Wu, Chang-Ming; 陳源彬, ;Chen, Yuan Been; 羅峻旗, ;Lo, Chun-Chi |
| 國立臺灣師範大學 |
2014-10-30T09:28:22Z |
Area measurement system using a single camera
|
C.-C. Chen; T.-H. Wang; M.-C. Lu; W.-Y. Wang |
| 國立交通大學 |
2017-04-21T06:55:43Z |
Area Minimization Synthesis for Reconfigurable Single-Electron Transistor Arrays with Fabrication Constraints
|
Chen, Yi-Hang; Chen, Jian-Yu; Huang, Juinn-Dar |
| 國立交通大學 |
2015-07-21T08:31:16Z |
Area Minimization Synthesis for Reconfigurable Single-Electron Transistor Arrays with Fabrication Constraints
|
Chen, Yi-Hang; Chen, Jian-Yu; Huang, Juinn-Dar |
| 國立臺灣科技大學 |
2003 |
Area scoped LSP restoration for MPLS with differentiated resilience QoS
|
Yuh-Wen Yang;Ferng, Huei-Wen |
| 國立交通大學 |
2018-08-21T05:56:47Z |
Area Spectral Efficiency for Cellular Networks with Small Reuse Distance: An Algebraic Approach
|
Hou, Hsin-An; Wang, Li-Chun |
| 國立勤益科技大學 |
2012-05 |
Area temperature system monitoring and computing based on adaptive fuzzy logic in wireless sensor networks
|
宋文財 |
| 臺大學術典藏 |
2003-07-31 |
Area, Delay, Power , and Noise Optimization for Transmission Lines
|
張耀文; 張耀文 |
| 臺大學術典藏 |
2004-07-31 |
Area, Delay, Power, and Noise Optimization for Transmission Lines
|
張耀文; 張耀文 |
| 中華大學 |
2005 |
Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form
|
謝曜式; Shieh, Yaw-Shih |
| 中華大學 |
2005 |
Area, Power and Throughput Trade-Offs for 2-D Inverse Discrete Wavelet Transform Architectures Using Direct Form
|
林國珍; Lin, Kuo-Jen |
| 中華大學 |
2005 |
Area, Power and Throughput Trade-Offs in the Design of Pipelined 2-D Discrete Wavelet Transform Architectures Using Direct Cascading Form
|
林國珍; Lin, Kuo-Jen |
| 中華大學 |
2005 |
Area, Power and Throughput Trade-Offs in the Design of Pipelined 2-D Discrete Wavelet Transform Architectures Using Direct Cascading Form
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2005 |
Area, Power and Throughput Trade-Offs in the Design of Pipelined 2-D Discrete Wavelet Transform Architectures Using Direct Cascading Form
|
謝曜式; Shieh, Yaw-Shih |
| 國立臺灣科技大學 |
2014 |
Area- and power-efficient DC-DC converter with on-chip compensation
|
Liu, P.-J.;Chang, Y.-H. |
| 元智大學 |
Sep-16 |
Area-aware Decomposition for Single-Electron Transistor Arrays
|
陳勇志; Ching-Hsuan Ho; Chun-Yao Wang; Ching-Yi Huang; Suma Datta; Vijaykrishnan Narayanan |
| 中國文化大學 |
2016-07 |
Area-Delay Efficient Digit-Serial Multiplier Based on k-Partitioning Scheme Combined With TMVP Block Recombination Approach
|
Lee, CY (Lee, Chiou-Yng); Meher, PK (Meher, Pramod Kumar); Liu, CH (Liu, Chung-Hsin) |
| 中華大學 |
2007 |
Area-Driven Decoupling Capacitance Allocation Based on Space Sensitivity Analysis for Signal Integrity
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2007 |
Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity
|
顏金泰; YAN, JIN-TAI |
| 中華大學 |
2006 |
Area-Driven White Space Distribution for Detailed Floorplan Design
|
顏金泰; YAN, JIN-TAI |
| 國立交通大學 |
2014-12-08T15:26:16Z |
Area-effective FIR filter design for multiplier-less implementation
|
Lin, TJ; Yang, TH; Jen, CW |
| 國立交通大學 |
2014-12-16T06:13:48Z |
Area-efficiency delta modulator for quantizing an analog signal
|
Wu Chun-Yu; Lyu Yuan-Fu |
| 國立臺灣海洋大學 |
2014 |
Area-Efficient 128- to 2048/1536-Point Pipeline FFT Processor for LTE and Mobile WiMAX Systems
|
Chu Yu;Mao-Hsu Yen |
| 國立交通大學 |
2015-07-21T08:30:52Z |
Area-Efficient 2-D Digital Filter Architectures Possessing Diagonal and Four-Fold Rotational Symmetries
|
Chen, Pei-Yu; Van, Lan-Da; Reddy, Hari C.; Khoo, I-Hung |
| 國立交通大學 |
2016-03-28T00:04:24Z |
Area-Efficient and Low-Leakage Diode String for On-Chip ESD Protection
|
Lin, Chun-Yu; Wu, Po-Han; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:04:34Z |
AREA-EFFICIENT ARCHITECTURES FOR THE VITERBI ALGORITHM .1. THEORY
|
SHUNG, CB; LIN, HD; CYPHER, R; SIEGEL, PH; THAPAR, HK |
| 國立交通大學 |
2014-12-08T15:04:32Z |
AREA-EFFICIENT ARCHITECTURES FOR THE VITERBI ALGORITHM .2. APPLICATIONS
|
SHUNG, CB; LIN, HD; CYPHER, R; SIEGEL, PH; THAPAR, HK |
| 國立中山大學 |
2001-09 |
Area-Efficient Carry-Save Full Adder Design Using Pass Transistors
|
Tso-Bing Juan; Ming-Ju Tsia; Shen-Fu Hsiao |
| 國立交通大學 |
2015-12-02T02:59:12Z |
Area-Efficient ESD Clamp Circuit With a Capacitance-Boosting Technique to Minimize Standby Leakage Current
|
Altolaguirre, Federico A.; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:34Z |
Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs
|
Chen, Shih-Hung; Ker, Ming-Dou |
| 義守大學 |
2009-05 |
Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs
|
Shih-Hung Chen;Ming-Dou Ker |
| 國立彰化師範大學 |
2010-08 |
Area-Efficient High Goodness-of-Fit Noise Generator for Communication Test
|
Chen, Pin-Chung; Fan, Sheng-Jie; Wang, Yun-Ping; Kao, Yung-Sheng; Huang, Tsung-Chu |
| 國立交通大學 |
2014-12-08T15:27:06Z |
Area-Efficient Instruction Set Extension Exploration with Hardware Design Space Exploration
|
Wu, I-Wei; Chung, Chung-Ping; Shann, Jean Jyh-Jiun |
| 國立交通大學 |
2019-08-02T02:18:28Z |
Area-Efficient On-Chip Transient Detection Circuit for System-Level ESD Protection Against Transient-Induced Malfunction
|
Chen, Wen-Chieh; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:49:47Z |
Area-Efficient Power-Rail ESD Clamp Circuit with SCR Device Embedded into ESD-Transient Detection Circuit in a 65nm CMOS Process
|
Yeh, Chih-Ting; Ker, Ming-Dou |
| 臺大學術典藏 |
2019-10-24T07:57:12Z |
Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding
|
吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Chun-Yu Chen;Chen-Hung Lin; Chen-Hung Lin; Chun-Yu Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇 |
