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Showing items 315171-315195 of 2348973 (93959 Page(s) Totally)
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| 育達商業科技大學 |
2008 |
Design of Portable Personal Information Management System with XML Technique
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吳振鋒 |
| 國立臺灣大學 |
1989 |
Design of Positional Compensator for Multi-Axis NC Machine Tools
|
范光照; Fan, K. C. |
| 國立臺灣大學 |
1989-07 |
Design of Positional Compensator for Multi-Axis NC Machine Tools
|
范光照; Fan, K. C. |
| 國立成功大學 |
2021 |
Design of power control for ultrasonic cleaning systems based on hybrid PID/fuzzy methodology
|
Su, T.-J.;Lo, K.-L.;Chung, Chung C.-L.;Tsai, J.S.-H.;Cheng, J.-C. |
| 國立交通大學 |
2014-12-08T15:02:26Z |
Design of power control mechanisms with PCM realization for the uplink of a DS-CDMA cellular mobile radio system
|
Chang, CJ; Lee, JH; Ren, FC |
| 國立交通大學 |
2019-04-02T05:58:33Z |
Design of power control mechanisms with PCM realization for the uplink of a DS-CDMA cellular mobile radio system
|
Chang, CJ; Lee, JH; Ren, FC |
| 臺大學術典藏 |
2018-09-10T08:19:05Z |
Design of Power Control Protocols for Spectrum Sharing in Cognitive Radio Networks: A Game-Theoretic Perspective
|
Y.-E. Lin;K.-H. Liu;H.-Y. Hsieh; Y.-E. Lin; K.-H. Liu; H.-Y. Hsieh; HUNG-YUN HSIEH |
| 國立臺灣科技大學 |
2019 |
Design of Power Decoupling Strategy for Single-Phase Grid-Connected Inverter under Nonideal Power Grid
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Huang, K.-P.;Wang, Y.;Wai, R.-J. |
| 亞洲大學 |
2010-06 |
Design of Power Quality Analyzer Based on Adaptive Linear Neural Network
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陳正一;Chen, Cheng-I |
| 亞洲大學 |
2010.06 |
Design of Power Quality Analyzer Based on Adaptive Linear Neural Network
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陳正一;Chen, Cheng-I |
| 國立臺灣大學 |
1985-10 |
Design of Power System Stabilizer Using Digital Control
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許源浴; Hsu, C. Y.; Hsu, Yuan-Yih; Hsu, C. Y. |
| 臺大學術典藏 |
1987-02 |
Design of Power System Stabilizers Using the Least-integral-square-error algorithm
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Hsu, Yuan-Yih; Hsu, Yuan-Yih |
| 國立臺灣大學 |
1987-02 |
Design of Power System Stabilizers Using the Least-integral-square-error algorithm
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許源浴; Hsu, Yuan-Yih |
| 亞洲大學 |
2012 |
Design of Power Virtual Harmonic Analyzer Based on IEC Std. 61000-4-7
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Fang, Chin-Hsien |
| 亞洲大學 |
2011-12 |
Design of Power Virtual Harmonic Based On IEC Std. 61000-4-7 Analyzer
|
陳正一;Chen, Cheng-I;陳正一;Chen, Cheng-I |
| 亞洲大學 |
2011.12 |
Design of Power Virtual Harmonic Based On IEC Std. 61000-4-7 Analyzer
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陳正一;Chen, Cheng-I |
| 臺大學術典藏 |
2018-09-10T08:10:54Z |
Design of power-assisted motor for vehicle air-conditioning systems
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Yang, Y.-P.; Liu, H.-F.; Liu, J.-J.; YEE-PIEN YANG |
| 國立交通大學 |
2014-12-08T15:25:23Z |
Design of power-aware multiplier with graceful quality-power trade-offs
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Yen, JH; Dung, LR; Shen, CY |
| 國立中山大學 |
2009-04 |
Design of Power-Efficient Configurable Booth Multiplier
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Shiann-Rong Kung;Jiun-Ping Wang |
| 國立中山大學 |
2007 |
Design of power-efficient pipelined truncated multipliers with various output precision
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S.R. Kuang;J.P. Wang |
| 國立交通大學 |
2017-04-21T06:50:01Z |
Design of Power-Rail ESD Clamp Circuit with Adjustable Holding Voltage against Mis-trigger or Transient-Induced Latch-On Events
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Yeh, Chih-Ting; Liang, Yung-Chih; Ker, Ming-Dou |
| 國立交通大學 |
2014-12-08T15:09:50Z |
Design of Power-Rail ESD Clamp Circuit With Ultra-Low Standby Leakage Current in Nanoscale CMOS Technology
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Wang, Chang-Tzu; Ker, Ming-Dou |
| 義守大學 |
2009-03 |
Design of Power-Rail ESD Clamp Circuit With Ultra-Low Standby Leakage Current in Nanoscale CMOS Technology
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Chang-Tzu Wang;Ming-Dou Ker |
| 國立交通大學 |
2018-08-21T05:53:21Z |
Design of Power-Rail ESD Clamp With Dynamic Timing-Voltage Detection Against False Trigger During Fast Power-ON Events
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Chen, Jie-Ting; Ker, Ming-Dou |
| 國立臺灣科技大學 |
2018 |
Design of PPC Buffer for Diff-RAID/PPC
|
林紘立 |
Showing items 315171-315195 of 2348973 (93959 Page(s) Totally)
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