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Showing items 461076-461100 of 2348570 (93943 Page(s) Totally)
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| 南台科技大學 |
2017 |
Hardware and Software Cooperative Control System for Die-Cutting Machine Tool
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Su, Chia-Hsiang; Lin, Horng-Horng; Liu, Yu-Shih |
| 國立臺灣大學 |
2008 |
Hardware architecture design and implementation of ray-triangle intersection with bounding volume hierarchies
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Chang, Chen-Haur; Lee, Chuan-Yiu; Chien, Shao-Yi |
| 臺大學術典藏 |
2018-09-10T07:03:44Z |
Hardware architecture design and implementation of ray-triangle intersection with bounding volume hierarchies
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Chang, Chen-Haur; Lee, Chuan-Yiu; Chien, Shao-Yi; SHAO-YI CHIEN |
| 臺大學術典藏 |
2004-05 |
Hardware architecture design for H.264/AVC intra frame coder
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Huang, Yu-Wen; Hsieh, Bing-Yu; Chen, Tung-Chien; Chen, Liang-Gee; Huang, Yu-Wen; Hsieh, Bing-Yu; Chen, Tung-Chien; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Hardware architecture design for H.264/AVC intra frame coder
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Huang, Yu-Wen; Hsieh, Bing-Yu; Chen, Tung-Chien; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:47:21Z |
Hardware architecture design for H.264/AVC intra frame coder
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Huang, Y.-W.; Hsieh, B.-Y.; Chen, T.-C.; Chen, L.-G.; Huang, Y.-W.; Hsieh, B.-Y.; Chen, T.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2003-05 |
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264
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Hsieh, Bing-Yu; Chen, Liang-Gee; Wang, Tu-Chih; Huang, Yu-Wen; Wang, Tu-Chih; Hsieh, Bing-Yu; Chen, Liang-Gee; Huang, Yu-Wen |
| 國立臺灣大學 |
2003-05 |
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264
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Huang, Yu-Wen; Wang, Tu-Chih; Hsieh, Bing-Yu; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:27:46Z |
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264
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Huang, Y.-W.; Wang, T.-C.; Hsieh, B.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2004-08 |
Hardware architecture design for visual processing: present and future
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Tseng, Po-Chih; Chen, Liang-Gee; Tseng, Po-Chih; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-08 |
Hardware architecture design for visual processing: present and future
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Tseng, Po-Chih; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:47:20Z |
Hardware architecture design for visual processing: Present and future
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Tseng, P.-C.; Chen, L.-G.; Tseng, P.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2006-01 |
Hardware architecture design of an H.264/AVC video codec
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Chen, Tung-Chien; Lian, Chung-Jr; Chen, Liang-Gee; Chen, Tung-Chien; Lian, Chung-Jr; Chen, Liang-Gee |
| 國立臺灣大學 |
2006-01 |
Hardware architecture design of an H.264/AVC video codec
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Chen, Tung-Chien; Lian, Chung-Jr; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T05:50:30Z |
Hardware architecture design of an H.264/AVC video codec
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Chen, T.-C.; Lian Jr.; C.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立臺灣大學 |
2011 |
Hardware architecture design of frame rate up-conversion for high definition videos with global motion estimation and compensation
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Hsu, Kung-Yen; Chien, Shao-Yi |
| 臺大學術典藏 |
2018-09-10T08:42:33Z |
Hardware architecture design of frame rate up-conversion for high definition videos with global motion estimation and compensation
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Hsu, Kung-Yen;Chien, Shao-Yi; Hsu, Kung-Yen; Chien, Shao-Yi; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T09:22:24Z |
Hardware architecture design of hybrid distributed video coding with frame level coding mode selection
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Chiu, C.-C.; Wu, H.-F.; Chien, S.-Y.; Lee, C.-H.; Somayazulu, V.S.; Chen, Y.-K.; SHAO-YI CHIEN |
| 國立臺灣大學 |
2005-08 |
Hardware architecture design of video compression for multimedia communication systems
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Chien, Shao-Yi; Huang, Yu-Wen; Chen, Ching-Yeh; Chen, Homer H.; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T05:15:48Z |
Hardware architecture design of video compression for multimedia communication systems
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Chen, Liang-Gee; Chen, Homer H.; Chen, Ching-Yeh; Huang, Yu-Wen; LIANG-GEE CHEN; Chien, Shao-Yi; Chien, Shao-Yi; LIANG-GEE CHEN |
| 臺大學術典藏 |
2007-04-19T04:02:59Z |
Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile
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Chen, Liang-Gee;Chien, Shao-Yi;Huang, Yu-Wen;Chen, Ching-Yeh;Chao, Wei-Min; Chen, Ching-Yeh; Chien, Shao-Yi; Chao, Wei-Min; Huang, Yu-Wen; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile
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Chen, Ching-Yeh; Chien, Shao-Yi; Chao, Wei-Min; Huang, Yu-Wen; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:47:19Z |
Hardware architecture for global motion estimation for MPEG-4 advanced simple profile
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Chen, C.-Y.; Chien, S.-Y.; Chao, W.-M.; Huang, Y.-W.; Chen, L.-G.; Chen, C.-Y.; Chien, S.-Y.; Chao, W.-M.; Huang, Y.-W.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立交通大學 |
2014-12-08T15:09:16Z |
Hardware Architecture for High-Performance Regular Expression Matching
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Lee, Tsern-Huei |
| 中華大學 |
2011 |
Hardware Architecture of Real-Time Stereoscopic Image Generation from Depth Map
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鄭芳炫; Cheng, Fang Hsuan |
Showing items 461076-461100 of 2348570 (93943 Page(s) Totally)
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