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Institution	Date	Title	Author
臺大學術典藏	2018-09-10T14:57:59Z	Routability-driven blockage-aware macro placement	Chen, Y.-F.;Huang, C.-C.;Chiou, C.-H.;Chang, Y.-W.;Wang, C.-J.; Chen, Y.-F.; Huang, C.-C.; Chiou, C.-H.; Chang, Y.-W.; Wang, C.-J.; YAO-WEN CHANG
國立交通大學	2015-07-21T08:30:53Z	Routability-Driven Bump Assignment for Chip-Package Co-Design	Chen, Meng-Ling; Tsai, Tu-Hsiung; Chen, Hung-Ming; Chen, Shi-Hao
中華大學	2010	Routability-Driven Flip-Flop Merging Process for Clock Power Reduction	顏金泰; YAN, JIN-TAI
國立成功大學	2021	Routability-driven Global Placer Target on Removing Global and Local Congestion for VLSI Designs	Lin, J.-M.;Huang, C.-W.;Zane, L.-C.;Tsai, M.-C.;Lin, C.-L.;Tsai, C.-F.
國立臺灣科技大學	2019	Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model	Huang, Y.-H.;Xie, Z.;Fang, G.-Q.;Yu, T.-C.;Ren, H.;Fang, S.-Y.;Chen, Y.;Hu, J.
國立成功大學	2019	Routability-driven mixed-size placement prototyping approach considering design hierarchy and indirect connectivity between macros	Lin, J.-M.;Li, S.-T.;Wang, Y.-T.
國立成功大學	2023	Routability-Driven Orientation-Aware Analytical Placement for System in Package	Lin, J.-M.;Tsai, Tsai T.-C.;Shen, R.-T.
中華大學	2010	Routability-driven partitioning-based IO assignment for flip-chip designs	顏金泰; YAN, JIN-TAI
臺大學術典藏	2018-09-10T09:48:07Z	Routability-driven placement for hierarchical mixed-size circuit designs	Hsu, M.-K.;Chen, Y.-F.;Huang, C.-C.;Chen, T.-C.;Chang, Y.-W.; Hsu, M.-K.; Chen, Y.-F.; Huang, C.-C.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG
中華大學	2010	Routability-Driven RDL Routing with Pin Reassignment	顏金泰; YAN, JIN-TAI

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