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Institution	Date	Title	Author
國立交通大學	2014-12-08T15:17:10Z	A broadband and scalable model for on-chip inductors incorporating substrate and conductor loss effects	Guo, JC; Tan, TY
國立交通大學	2014-12-08T15:13:09Z	A broadband and scalable on-chip inductor model appropriate for operation modes of varying substrate resistivities	Guo, Jyh-Chyurn; Tan, Teng-Yang
國立交通大學	2014-12-08T15:25:07Z	A broadband and scalable on-chip inductor model appropriate for operation modes of varying substrate resistivities	Guo, J. C.; Tan, T. Y.
國立交通大學	2014-12-08T15:25:07Z	A broadband and scalable on-chip inductor model appropriate for operation modes of varying substrate resistivities	Guo, J. C.; Tan, T. Y.
國立臺灣大學	2009	A broadband balanced distributed frequency doubler with a sharing collector line	Lin, K.-Y.; Huang, J.-Y.; Hsieh, C.-K.; Shin, S.-C.
臺大學術典藏	2018-09-10T07:35:49Z	A broadband balanced distributed frequency doubler with a sharing collector line	Lin, K.-Y.;Huang, J.-Y.;Hsieh, C.-K.;Shin, S.-C.; Lin, K.-Y.; Huang, J.-Y.; Hsieh, C.-K.; Shin, S.-C.; KUN-YOU LIN
臺大學術典藏	2018-09-10T08:18:39Z	A broadband chip-level power-bus model feasible for power integrity chip-package co-design in high-speed memory circuits	H.-H. Chuang;C.-J. Hsu;J. Hong;C.-H. Yu;A. Cheng;J. Ku;T.-L. Wu; H.-H. Chuang; C.-J. Hsu; J. Hong; C.-H. Yu; A. Cheng; J. Ku; T.-L. Wu; TZONG-LIN WU
國立臺灣大學	2010	A Broadband Chip-Level Power-Bus Model Feasible for Power Integrity Chip-Package Codesign in High-Speed Memory Circuits	Chuang, Hao-Hsiang; Hsu, Chih-Jung; Hong, J.; Yu, Chun-Huang; Cheng, A.; Ku, J.; Wu, Tzong-Lin
國立中山大學	1999	A broadband circular microstrip antenna with two open-ring slots	J.Y. Jan; K.L. Wong
國立中山大學	1999-11	A broadband circular microstrip antenna with two open-ring slots	J.Y. Jan ; K.L. Wong

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