| 國立臺灣大學 |
2002 |
Clipless Laparoscopic Adrenalectomy with Needlescopic Instruments
|
闕士傑; 陳淳; 陳世乾; 廖俊厚; 賴明坤; CHUEH, SHIH-CHIEH; CHEN, JUN; CHEN, SHYH-CHYAN; LIAO, CHUN-HOU; LAI, MING-KUEN |
| 國立臺灣大學 |
2005-02 |
Clipless needlescopic bilateral varix ligation
|
Chueh, SC; Liao, CH; Wang, SM; Hsieh, MH; Lai, MK; Jun, C |
| 臺大學術典藏 |
2021-08-02T02:32:20Z |
Clipless needlescopic bilateral varix ligation
|
SHIH-CHIEH CHUEH; Liao C.-H.; Wang S.-M.; Hsieh M.-H.; Lai M.-K.; Chen J. |
| 臺大學術典藏 |
2021-02-01T07:30:49Z |
Clipless needlescopic bilateral varix ligation
|
Chueh S.-C.;Liao C.-H.;Shuo-Meng Wang;Hsieh M.-H.;Lai M.-K.;Chen J.; Chueh S.-C.; Liao C.-H.; SHUO-MENG WANG; Hsieh M.-H.; Lai M.-K.; Chen J. |
| 國立交通大學 |
2014-12-08T15:25:18Z |
Clipping ratio estimation for OFDM receivers
|
Lin, CT; Wu, WR |
| 國立高雄大學 |
2008 |
CLIPS Pattern Matching
|
王學亮 |
| 國立臺灣大學 |
2008 |
Clique coverings and partitions of line graphs
|
Li, B.J.; Chang, G.J. |
| 元智大學 |
2003-08 |
Clique Modeling of Hyperedges for Circuit Partitioning
|
林榮彬 |
| 國立成功大學 |
2013-12 |
Clique-Based Architectural Synthesis of Flow-Based Microfluidic Biochips
|
Trung Anh Dinh; Yamashita, Shigeru; Ho, Tsung-Yi; Hara-Azumi, Yuko |
| 元智大學 |
2007-10 |
Clique-Partitioning Connections- Scheduling with Faulty Switches in Dilated Benes Network
|
曾王道; 黃依賢 |
| 元智大學 |
2007-10 |
Clique-Partitioning Connections- Scheduling with Faulty Switches in Dilated Benes Network
|
曾王道; 黃依賢 |
| 元智大學 |
2009-09 |
Clique-Partitioning Connections-Scheduling with Faulty Switches in Dilated Benes Network
|
曾王道; 黃依賢; 楊正仁; Long-Len Lee |
| 元智大學 |
2009-09 |
Clique-Partitioning Connections-Scheduling with Faulty Switches in Dilated Benes Network
|
曾王道; 黃依賢; 楊正仁; Long-Len Lee |
| 國立臺灣師範大學 |
2015-01-29T09:15:19Z |
Clitic climbing of suo in Mandarin Chinese and its implications for universal grammar
|
Ting, Jen |
| 致理技術學院 |
2021-01 |
CLL旅遊 APP
|
曾文祥, 黃俊淵,林冠伶,王峰亮,游雅竹,鄧又成,鍾欣庭 |
| 國立臺灣大學 |
1985 |
Clnical Observation of Infantile Hypertrophic Pyloric Stenosis in Chinese
|
陳秋江; Chen, Chiu-Chiang |
| 國立暨南國際大學 |
2015 |
CLNS1A在肺癌細胞株H1299中引發細胞轉型的分子機制探討
|
王怡文; Wang, Yi-Wun |
| 國立臺灣科技大學 |
2008-01 |
CLO+H
|
曾允楷 |
| 國立成功大學 |
2008-09-15 |
Cloak for curvilinearly anisotropic media in conduction
|
Chen, Tungyang; Weng, Chung-Ning; Chen, Jun-Shan |
| 國立中山大學 |
2009 |
Cloaking of matter waves under the global Aharonov-Bohm effect
|
De-Hone Lin;Pi-Gang Luan |
| 國立成功大學 |
2020-06-12 |
Cloaking: Controlling Thermal and Hydrodynamic Fields Simultaneously
|
Yeung;Woon-Shing;Mai;Van-Phung;Yang;Ruey-Jen |
| 臺北醫學大學 |
2011 |
Clobetasol 0.5mgg 10gmtube 可立舒 乳膏
|
藥劑部藥師 |
| 國立臺灣科技大學 |
2020-03 |
CLOCK CONSTRUCTED USING THE 555 OSCILLATOR
|
Shih-Ping Hu |
| 臺大學術典藏 |
2022-05-21T23:36:33Z |
Clock Design Methodology for Energy and Computation Efficient Bitcoin Mining Machines
|
Lu, Chien Pang; HUI-RU JIANG; Yang, Chih Wen |
| 臺大學術典藏 |
2007 |
Clock Free Data Streams Alignment for Sensor Networks
|
Lee, Guo-Liang; Shih, Chi-Sheng; Lee, Guo-Liang; Shih, Chi-Sheng |
| 國立臺灣大學 |
2007 |
Clock Free Data Streams Alignment for Sensor Networks
|
Lee, Guo-Liang; Shih, Chi-Sheng |
| 臺大學術典藏 |
2007 |
Clock Free Data Streams Alignment for Sensor Networks.
|
Lee, Guo-Liang; Shih, Chi-Sheng; CHI-SHENG SHIH |
| 元智大學 |
2011-03 |
Clock Gating Optimization with Delay-Matching
|
Shih-Jung Hsu; Lin R.-B. |
| 臺大學術典藏 |
2018-09-10T06:37:56Z |
Clock generator having a 50% duty-cycle
|
Tsung-Hsien Lin; TSUNG-HSIEN LIN |
| 中原大學 |
2002-08 |
Clock Period Minimization by Incorporating Clock Skew Scheduling and Gate-Level Delay Insertion
|
Huang, Shih-Hsu;Nieh, Yow-Tyng |
| 國立交通大學 |
2014-12-08T15:21:18Z |
Clock Planning for Multi-Voltage and Multi-Mode Designs
|
Tsai, Chang-Cheng; Lin, Tzu-Hen; Tsai, Shin-Han; Chen, Hung-Ming |
| 國立中山大學 |
2004-12 |
Clock recovery and data recovery design for LVDS transceiver used in LCD panels
|
C.C. Wang;C.L. Lee;C.Y. Hsiao;J.F. Huang |
| 國立中山大學 |
2004-06 |
Clock recovery and data recovery design for LVDS transceiver used in LCD panels
|
C.C. Wang;C.L. Lee;C.Y. Hsiao;J.F. Huang |
| 臺大學術典藏 |
2018-09-10T09:25:33Z |
Clock Rescheduling for Timing Engineering Change Orders
|
Kuan-Hsien Ho;Xin-Wei Shih;Jie-Hong R. Jiang; Kuan-Hsien Ho; Xin-Wei Shih; Jie-Hong R. Jiang; JIE-HONG JIANG |
| 元智大學 |
2010-03 |
Clock Routing for Structured ASICs with Via-Configurable Fabrics
|
林榮彬; I-Wei Lee; Wen-Hao Chen |
| 元智大學 |
2010-03 |
Clock Routing for Structured ASICs with Via-Configurable Fabrics
|
林榮彬; I-Wei Lee; Wen-Hao Chen |
| 國立臺灣科技大學 |
2012 |
Clock skew based client device identification in cloud environments
|
Huang, D.-J.;Yang, K.-T.;Ni, C.-C.;Teng, W.-C.;Hsiang, T.-R.;Lee, Y.-J. |
| 國立臺灣科技大學 |
2008-11-30 |
Clock Skew Based Node Identification in Wireless Sensor Networks
|
黃鼎傑;鄧惟中;王志元;黃炫諭;Joseph M. Hellerstein |
| 國立臺灣科技大學 |
2008 |
Clock Skew Based Node Identification in Wireless Sensor Networks
|
Ding-Jie Huang;Wei-Chung Teng;Chih-Yuan Wang;Hsuan-Yu Huang;Joseph M. Hellerstein |
| 國立臺灣科技大學 |
2008-11 |
Clock Skew Based Node Identification in Wireless Sensor Networks
|
Ding-Jie Huang;Wei-Chung Teng;Chih-Yuan Wang;Hsuan-Yu Huang;Hellerstein, J.M. |
| 國立臺灣科技大學 |
2008 |
Clock skew based node identification in wireless sensor networks
|
Huang D.-J.; Teng W.-C.; Wang C.-Y.; Huang H.-Y.; Hellerstein J.M. |
| 中原大學 |
2003-12 |
Clock Skew Scheduling for Peak Current Minimization
|
Chang, Chia-Ming;Huang, Shih-Hsu;Nieh, Yow-Tyng |
| 國立交通大學 |
2014-12-16T06:14:31Z |
Clock switching circuit
|
Wu; Jian-Hua; Hwang; Wei |
| 國立交通大學 |
2014-12-16T06:16:05Z |
Clock switching circuit
|
Wu, Jian-Hua; Hwang, Wei |
| 國立交通大學 |
2017-04-21T06:49:49Z |
Clock Synchronization by Phase Difference in Timing Estimation
|
Chang, Wen-Thong |
| 國立交通大學 |
2018-08-21T05:57:01Z |
Clock Tree Aware Post-Global Placement Optimization
|
Su, Hong-Yan; Chiang, Po-Ting; Samanta, Radhamanjari; Li, Yih-Lang |
| 國立交通大學 |
2015-07-21T11:21:03Z |
Clock Tree Synthesis Considering Slew Effect on Supply Voltage Variation
|
Wang, Chun-Kai; Chang, Yeh-Chi; Chen, Hung-Ming; Chin, Ching-Yu |
| 國立中山大學 |
2006 |
Clock-and-data recovery design for LVDS transceiver used in LCD panels
|
C.C. Wang;C.L. Lee;C.Y. Hsiao;J.F. Huang |
| 國立中山大學 |
2006-11 |
Clock-and-data recovery design for LVDS transceiver used in LCD panels
|
C.C. Wang;C.L. Lee;C.Y. Hsiao;J.F. Huang |
| 臺大學術典藏 |
2021-09-02T00:09:07Z |
Clock-Aware Placement for Large-Scale Heterogeneous FPGAs
|
Chen J;Lin Z;Kuo Y.-C;Huang C.-C;Chang Y.-W;Chen S.-C;Chiang C.-H;Kuo S.-Y.; Chen J; Lin Z; Kuo Y.-C; Huang C.-C; Chang Y.-W; Chen S.-C; Chiang C.-H; Kuo S.-Y.; YAO-WEN CHANG |
