| 國立聯合大學 |
2008 |
Design and Analysis of 2D Codes with the Maximum Cross-Correlation Value of Two for Optical CDMA
|
J.-H. Tien, G.-C. Yang, C.-Y. Chang and W. C. Kwong, |
| 國立臺灣師範大學 |
2014-10-30T09:28:43Z |
Design and analysis of a 0.8-77.5-GHz ultra-broadband distributed drain mixer using 0.13-μm CMOS technology
|
Hong-Yuan Yang; Jeng-Han Tsai; Chi-Hsueh Wang; Chin-Shen Lin; Wei-Heng Lin; Kun-You Lin; Tian-Wei Huang; Huei Wang |
| 國立臺灣大學 |
2009 |
Design and Analysis of a 0.8-77.5-GHz Ultra-Broadband Distributed Drain Mixer Using 0.13-μm CMOS Technology
|
Yang, Hong-Yuan; Tsai, Jeng-Han; Wang, Chi-Hsueh; Lin, Chin-Shen; Lin, Wei-Heng; Lin, Kun-You; Huang, Tian-Wei; Wang, Huei |
| 臺大學術典藏 |
2020-06-11T06:31:46Z |
Design and analysis of a 0.877.5-GHz ultra-broadband distributed drain mixer using 0.13-μm CMOS technology
|
Yang, H.-Y.;Tsai, J.-H.;Wang, C.-H.;Lin, C.-S.;Lin, W.-H.;Lin, K.-Y.;Huang, T.-W.;Wang, H.; Yang, H.-Y.; Tsai, J.-H.; Wang, C.-H.; Lin, C.-S.; Lin, W.-H.; Lin, K.-Y.; Huang, T.-W.; Wang, H.; TIAN-WEI HUANG |
| 臺大學術典藏 |
2020-06-04T07:54:22Z |
Design and analysis of a 0.877.5-GHz ultra-broadband distributed drain mixer using 0.13-μm CMOS technology
|
Yang, H.-Y.;Tsai, J.-H.;Wang, C.-H.;Lin, C.-S.;Lin, W.-H.;Lin, K.-Y.;Huang, T.-W.;Wang, H.; Yang, H.-Y.; Tsai, J.-H.; Wang, C.-H.; Lin, C.-S.; Lin, W.-H.; Lin, K.-Y.; Huang, T.-W.; Wang, H.; HUEI WANG |
| 臺大學術典藏 |
2020-06-11T06:25:37Z |
Design and analysis of a 0.877.5-GHz ultra-broadband distributed drain mixer using 0.13-μm CMOS technology
|
Yang, H.-Y.;Tsai, J.-H.;Wang, C.-H.;Lin, C.-S.;Lin, W.-H.;Lin, K.-Y.;Huang, T.-W.;Wang, H.; Yang, H.-Y.; Tsai, J.-H.; Wang, C.-H.; Lin, C.-S.; Lin, W.-H.; Lin, K.-Y.; Huang, T.-W.; Wang, H.; KUN-YOU LIN |
| 元智大學 |
2009-03 |
Design and analysis of a 0.877.5-GHz ultra-broadband distributed drain mixer using 0.13-弮m CMOS technology
|
蔡政翰; Hong-Yuan Yang; Chi-Hsueh Wang; Chin-Shen Lin; Wei-Heng Lin; Kun-You Lin; Tian-Wei Huang; Huei Wang |
| 國立臺灣大學 |
2009 |
Design and Analysis of a 0.8–77.5-GHz Ultra-Broadband Distributed Drain Mixer Using 0.13-$mu$m CMOS Technology
|
Yang, Hong-Yuan; Tsai, Jeng-Han; Wang, Chi-Hsueh; Lin, Chin-Shen; Lin, Wei-Heng; Lin, Kun-You; Huang, Tian-Wei; Yang, Huei Hong-Yuan; Tsai, Jeng-Han; Wang, Chi-Hsueh; Lin, Chin-Shen; Lin, Wei-Heng; Lin, Kun-You; Huang, Tian-Wei; Wang, Huei |
| 國立臺灣大學 |
1999 |
Design and Analysis of a 2-D Eigenspace-Based Interference Canceller
|
Lee, Cheng-Chou; Lee, Ju-Hong |
| 臺大學術典藏 |
2018-09-10T07:41:31Z |
Design and Analysis of a 2-D Eigenspace-Based Interference Canceller
|
C.-C. Lee; Ju-Hong Lee; JU-HONG LEE |
| 國立交通大學 |
2017-04-21T06:48:52Z |
Design and Analysis of a 2-DOF Planar Nano-positioner with Low Parasitic Rotation
|
Lin, Hung-Ruei; Hung, Shao-Kang; Cheng, Chiao-Hua |
| 國立臺灣大學 |
2005-06 |
Design and analysis of a 20-GHz clock multiplication unit in 0.18-/spl mu/m CMOS technology
|
Lee, Jri; Wu, Shanghann |
| 臺大學術典藏 |
2018-09-10T05:29:28Z |
Design and Analysis of a 20-GHz Clock Multiplication Unit in 0.18-μm CMOS Technology
|
Jri Lee; Shanghann Wu; JRI LEE |
| 國立暨南國際大學 |
2012 |
Design and Analysis of a 21-29-GHz Ultra-Wideband Receiver Front-End in 0.18-mu m CMOS Technology
|
Huang, SL; Huang, SL |
| 國立暨南國際大學 |
2012 |
Design and Analysis of a 21-29-GHz Ultra-Wideband Receiver Front-End in 0.18-mu m CMOS Technology
|
李仁豪?; Lee, JH |
| 國立暨南國際大學 |
2012 |
Design and Analysis of a 21-29-GHz Ultra-Wideband Receiver Front-End in 0.18-mu m CMOS Technology
|
林佑昇; Lin, YS |
| 國立暨南國際大學 |
2012 |
Design and Analysis of a 21-29-GHz Ultra-Wideband Receiver Front-End in 0.18-mu m CMOS Technology
|
Wang, CC; Wang, CC |
| 國立暨南國際大學 |
2012 |
Design and Analysis of a 21-29-GHz Ultra-Wideband Receiver Front-End in 0.18-mu m CMOS Technology
|
Wang, CH; Wang, CH |
| 國立臺灣師範大學 |
2014-10-30T09:28:45Z |
Design and analysis of a 44-GHz MMIC low-loss built-in linearizer for high-linearity medium power amplifiers
|
Jeng-Han Tsai; Hong-Yeh Chang; Pei-Si Wu; Yi-Lin. Lee; Tian-Wei Huang; Huei Wang |
| 國立臺灣師範大學 |
2014-10-30T09:28:45Z |
Design and analysis of a 44-GHz MMIC low-loss built-in linearizer for high-linearity medium power amplifiers
|
Jeng-Han Tsai; Hong-Yeh Chang; Pei-Si Wu; Yi-Lin. Lee; Tian-Wei Huang; Huei Wang |
| 國立臺灣大學 |
2006 |
Design and Analysis of a 44-GHz MMIC Low-loss Built-in Linearizer for High-Linearity Medium Power Amplifiers
|
Tsai, Jeng-Han; Chang, Hong-Yeh; Wu, Pei-Si; Lee, Yi-Lin; Huang, Tian-Wei; Wang, Huei |
| 臺大學術典藏 |
2018-09-10T06:03:10Z |
Design and Analysis of a 44-GHz MMIC Low-loss Built-in Linearizer for High-Linearity Medium Power Amplifiers
|
Jeng-Han Tsai; Hong-Yeh Chang; Pei-Si Wu; Yi-Lin Lee; Tian-Wei Huang; Huei Wang; TIAN-WEI HUANG |
| 國立臺灣師範大學 |
2014-10-30T09:28:43Z |
Design and Analysis of A 55 to 71-GHz Compact and Broadband Distributed Active Transformer Power Amplifier in 90-nm CMOS Process
|
Yung-Nien Jen; Jeng-Han Tsai; Tian-Wei Huang; Huei Wang |
| 國立臺灣大學 |
2009 |
Design and analysis of a 55 to 71-GHz compact and broadband distributed active transformer power amplifier in 90-nm CMOS process
|
Jen, Yung-Nien; Tsai, Jeng-Han; Huang, Tian-Wei; Wang, Huei |
| 臺大學術典藏 |
2018-09-10T07:37:10Z |
Design and Analysis of a 55–71-GHz Compact and Broadband Distributed Active Transformer Power Amplifier in 90-nm CMOS Process
|
HUEI WANG; Yung-Nien Jen;Jeng-Han Tsai;Tian-Wei Huang;Huei Wang; Yung-Nien Jen; Jeng-Han Tsai; Tian-Wei Huang; Huei Wang; TIAN-WEI HUANG |
| 臺大學術典藏 |
2018-09-10T08:47:16Z |
Design and Analysis of A 77.3 % Locking Range Divide-by-4 Frequency Divider
|
Yen-Hung Kuo; Jeng-Han Tsai; Hong-Yeh Chang; Tian-Wei Huang; TIAN-WEI HUANG |
| 國立臺灣師範大學 |
2014-10-30T09:28:43Z |
Design and analysis of a 77.3% locking-range divide-by-4 frequency divider
|
Yen-Hung Kuo; Jeng-Han Tsai; Hong-Yeh Chang; Tian-Wei Huang |
| 國立臺灣師範大學 |
2014-10-30T09:28:43Z |
Design and analysis of a 77.3% locking-range divide-by-4 frequency divider
|
Tian-Wei Huang; Yen-Hung Kuo; Jeng-Han Tsai; Hong-Yeh Chang |
| 亞洲大學 |
2016 |
Design and Analysis of a 90V Microwave P-I-N Diode Switches & Design of High performance UMOSFETs for power switching Application
|
Imam, Syed Sarwar |
| 國立臺灣大學 |
2002 |
Design and Analysis of a Backbone Architecture with TDMA Mechanism for IP Optical Networking
|
Chang, Chi-Yuan; Kuo, Sy-Yen |
| 臺大學術典藏 |
2018-09-10T04:15:11Z |
Design and Analysis of a Backbone Architecture with TDMA Mechanism for IP Optical Networking
|
C. Y. Chang; S. Y. Kuo; SY-YEN KUO |
| 臺大學術典藏 |
2020-01-13T08:20:59Z |
Design and analysis of a chaotic micromixer with vortices modulation
|
JING-TANG YANG;Yang, J.T.;Tung, K.Y.; Tung, K.Y.; Yang, J.T.; JING-TANG YANG |
| 國立交通大學 |
2014-12-08T15:06:44Z |
Design and Analysis of a CMOS Ratio-Memory Cellular Nonlinear Network (RMCNN) Requiring No Elapsed Time
|
Wu, Chung-Yu; Chen, Sheng-Hao; Wu, Yu |
| 國立交通大學 |
2014-12-08T15:07:32Z |
Design and analysis of a conceptual wavelength-division multiplexing optical network based on self-similarity
|
Kuo, Shu-Tsung; Kao, Ming-Seng |
| 元智大學 |
2005-11 |
Design and Analysis of a DCO with a Fast Synthesis Speed and a Large Output Range
|
趙燿庚; Chih-Chung Chang; Jeng-Fan Chen |
| 元智大學 |
2005-11 |
Design and Analysis of a DCO with a Fast Synthesis Speed and a Large Output Range
|
趙燿庚; Chih-Chung Chang; Jeng-Fan Chen |
| 元智大學 |
2005-11 |
Design and Analysis of a DCO with a Fast Synthesis Speed and a Large Output Range
|
趙燿庚; Chih-Chung Chang; Jeng-Fan Chen |
| 元智大學 |
Apr-23 |
Design and Analysis of a Dual Clock Edge-triggered Divide-by-four Divider
|
Yue-Fang Kuo; Ming-Hsien Yang; Chien-Kuo Liu |
| 南台科技大學 |
1989-03 |
Design and Analysis of a Dual-cavity Coat-hanger Die
|
李國陽; Lee; K. Y. and Liu; T. J. |
| 臺大學術典藏 |
1997-04 |
Design and analysis of a dynamic scheduler for a flexible assembly system
|
Huang, Tz-Shian; Fu, Li-Chen; Chen, Yung-Yu; Huang, Tz-Shian; Fu, Li-Chen; Chen, Yung-Yu |
| 國立臺灣大學 |
1997-04 |
Design and analysis of a dynamic scheduler for a flexible assembly system
|
Huang, Tz-Shian; Fu, Li-Chen; Chen, Yung-Yu |
| 臺大學術典藏 |
2020-05-04T08:01:18Z |
Design and analysis of a dynamic scheduler for a flexible assembly system.
|
Huang, Tz-Shian; Fu, Li-Chen; Chen, Yung-Yu; LI-CHEN FU |
| 國立彰化師範大學 |
2008-05 |
Design and Analysis of a Fast Infrared Tracking System with Winner-Take-All Implementation
|
Zhong, Jia-Wen; Chen, Shu-Jung; Shen, Chih-Hsiung |
| 國立交通大學 |
2014-12-08T15:12:40Z |
Design and analysis of a fault-tolerant coplanar gyro-free inertial measurement unit
|
Chen, Tsung-Lin |
| 國立成功大學 |
2014-05-01 |
Design and Analysis of a Frame-Based Dynamic Bandwidth Allocation Scheme for Fiber-Wireless Broadband Access Networks
|
Lai, Chia-Lin; Lin, Hui-Tang; Chiang, Hung-Hsin; Huang, Yu-Chih |
| 國立成功大學 |
2014-05-08 |
Design and analysis of a frame-oriented dynamic bandwidth allocation scheme for triple-play services over EPONs
|
Lin, Hui-Tang; Lai, Chia-Lin; Liu, Chin-Lien |
| 朝陽科技大學 |
2010-07-05 |
Design and analysis of a generalised n-stage current-mode multiphase switched-capacitor converter
|
張原豪 |
| 國立交通大學 |
2014-12-08T15:45:10Z |
Design and analysis of a growable multicast ATM switch
|
Wang, KC; Cheng, MH |
| 臺大學術典藏 |
1993-09 |
Design and analysis of a hierarchical and modular local ATM switch
|
Tsai, Zse-Hong; Yu, Kang-Yei; Lai, Fei-Pei; Tsai, Zse-hong; Yu, Kang-yei; Lai, Fei-pei; TsaiZsehong; LaiFeipei |
| 臺大學術典藏 |
1993-09 |
Design and Analysis of a Hierarchical and Modular Local ATM Switch
|
Tsai, Zse-Hong; Yu, K.; Lai, F.; 蔡志宏; Yu, K.; Lai, F.; Tsai, Zse-Hong; Yu, K.; Lai, F. |
