English  |  正體中文  |  简体中文  |  总笔数 :0  
造访人次 :  52518744    在线人数 :  1005
教育部委托研究计画      计画执行:国立台湾大学图书馆
 
臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
关于TAIR

浏览

消息

著作权

相关连结

跳至: [ 中文 ] [ 数字0-9 ] [ A B C D E F G H I J K L M N O P Q R S T U V W X Y Z ]
请输入前几个字:   

显示项目 445691-445715 / 2348570 (共93943页)
<< < 17823 17824 17825 17826 17827 17828 17829 17830 17831 17832 > >>
每页显示[10|25|50]项目

机构 日期 题名 作者
臺大學術典藏 2018-09-10T14:57:38Z Gate-bias stress stability of P-type SnO thin-film transistors fabricated by RF-sputtering Chiu, I.-C.;Cheng, I.-C.; Chiu, I.-C.; Cheng, I.-C.; I-CHUN CHENG
國立交通大學 2015-12-04T07:03:11Z GATE-BOOSTING RECTIFIER AND METHOD OF PERMITTING CURRENT TO FLOW IN FAVOR OF ONE DIRECTION WHEN DRIVEN BY AC INPUT VOLTAGE Wang Yu-Jiu; Liao I-No; Tsai Chao-Han; Pakasiri Chatrpol
國立中山大學 2006 Gate-controlled spin splitting in GaN/AlN quantum wells Ikai Lo;W.T. Wang;M.H. Gao;J.K. Tsai;S.F. Tsay;J.C. Chiang
國立中山大學 2006 Gate-controlled Spin Splitting in GaN/AlN Quantum Wells Ikai Lo;W.T. Wang;M.H. Gau;S.F. Tsay;Jih-Chen Chiang
國立中山大學 2006 Gate-Controlled Spin Splitting in GaN/AlN Quantum Wells Ikai Lo;W.T. Wang;M.H. Gau;J.K. Tsai;S.F. Tsay;J.C. Chiang
國立交通大學 2014-12-08T15:17:41Z Gate-controlled ZnO nanowires for field-emission device application Li, SY; Lee, CY; Lin, P; Tseng, TY
國立交通大學 2014-12-08T15:31:00Z Gate-first n-MOSFET with a sub-0.6-nm EOT gate stack Cheng, C. H.; Chou, K. I.; Chin, A.
國立交通大學 2014-12-08T15:47:59Z Gate-First TaN/La(2)O(3)/SiO(2)/Ge n-MOSFETs Using Laser Annealing Chen, W. B.; Wu, C. H.; Shie, B. S.; Chin, Albert
中華大學 2010 Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing 吳建宏; rossiwu
國立交通大學 2019-04-02T06:00:27Z Gate-First TaN/La2O3/SiO2/Ge n-MOSFETs Using Laser Annealing Chen, W. B.; Wu, C. H.; Shie, B. S.; Chin, Albert
國立交通大學 2019-04-02T05:58:20Z Gate-induced localized states in graphene: Topological nature in their formation Wang, L. Y.; Chang, Che-Yuan; Chu, C. S.
臺大學術典藏 2018-09-10T06:02:15Z Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) for Designing High-Speed Low-Power SOC Applications Using 90nm MTCMOS Technology B. Chung; J. B. Kuo; JAMES-B KUO
臺大學術典藏 2018-09-10T06:02:16Z Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) Using Path-Based Static Timing Analysis (STA) Technique B. Chung; J. B. Kuo; JAMES-B KUO
國立臺灣大學 2008 Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) Using Path-Based Static Timing Analysis (STA) Technique for SOC Application Chung, B.; Kuo, J.B.
臺大學術典藏 2018-09-10T07:08:18Z Gate-Level Dual-Threshold Static Power Optimization Methodology (GDSPOM) Using Path-Based Static Timing Analysis (STA) Technique for SOC Application JAMES-B KUO; B. Chung; J. B. Kuo
臺大學術典藏 2018-09-10T07:08:19Z Gate-Level Dual-Threshold Total Power Optimization Methodology (GDTPOM) Principle for Designing High-Speed Low-Power SOC Applications R. Chen; R. Liu; J. B. Kuo; JAMES-B KUO
國立臺灣海洋大學 2006 Gate-metal formation-related kink effect and gate current on In0.5Al0.5As/In0.5Ga0.5As metamorphic high electron mobility transistor performance M. K. Hsu;H. R. Chen;S. Y. Chiou;W. T. Chen;G. H. Chen;Y. C. Chang;W. S. Lour
國立臺灣海洋大學 2017 Gate-opening upon CO2 adsorption on a metal–organic framework that mimics a natural stimuli-response system. T. W. Tseng;L. W. Lee;T. T. Luo;P. H. Chien;Y. H. Liu;S. L. Lee;C. M. Wang;K. L. Lu
國立交通大學 2014-12-08T15:24:59Z Gate-oxide reliability on CMOS analog amplifiers in a 130-nm low-voltage CMOS processes Chen, Jung-Sheng; Ker, Ming-Dou
國立成功大學 2016-03-15 Gate-Recessed AlGaN/GaN ISFET Urea Biosensor Fabricated by Photoelectrochemical Method Lee, Ching-Ting; Chiu, Ying-Shuo
國立交通大學 2017-04-21T06:49:45Z Gate-stack engineering for self-aligned Ge-gate/SiO2/SiGe-channel Insta-MOS devices Lai, Wei-Ting; Yang, Kuo-Ching; Liao, Po-Hsiang; George, Thomas; Li, Pei-Wen
國立交通大學 2019-04-03T06:36:44Z Gate-Stack Engineering for Self-Organized Ge-dot/SiO2/SiGe-Shell MOS Capacitors Lai, Wei-Ting; Yang, Kuo-Ching; Liao, Po-Hsiang; George, Tom; Li, Pei-Wen
國立交通大學 2014-12-08T15:08:03Z Gate-to-drain capacitance verifying the continuous-wave green laser crystallization n-TFT trapped charges distribution under dc voltage stress Hsieh, Zhen-Ying; Wang, Mu-Chun; Chen, Shuang-Yuan; Chen, Chih; Huang, Heng-Sheng
國立成功大學 2015-07-06 Gate-tunable coherent transport in Se-capped Bi2Se3 grown on amorphous SiO2/Si Liu, Y. H.; Chong, C. W.; Jheng, J. L.; Huang, S. Y.; Huang, J. C. A.; Li, Z.; Qiu, H.; Huang, S. M.; Marchenkov, V. V.
國立成功大學 2019 Gate-Tunable Fano Resonances in Parallel-Polyacene-Bridged Carbon Nanotubes Dou, K.P.;Chang, Chang C.-H.;Kaun, C.-C.

显示项目 445691-445715 / 2348570 (共93943页)
<< < 17823 17824 17825 17826 17827 17828 17829 17830 17831 17832 > >>
每页显示[10|25|50]项目