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教育部委托研究计画 计画执行:国立台湾大学图书馆
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显示项目 558696-558705 / 2348971 (共234898页)
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每页显示[10|25|50]项目
| 國立成功大學 |
2005-04-23 |
Low-latitude ELF-whistlers observed in Taiwan
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Wang, Yun-Ching; Wang, Kaiti; Su, Han-Tzong; Hsu, Rue-Ron |
| 國立中山大學 |
2000 |
low-latitude ionospheric effects during a moderate storm by tomographic imaging
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J.S. Xu;S.Y. Ma;X.B. Wu;K.H. Lin;K.C. Yeh |
| 國立成功大學 |
2014-06 |
Low-latitude midnight brightness in 630.0 nm limb observations by FORMOSAT-2/ISUAL
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Rajesh, P. K.; Chen, C. H.; Lin, C. H.; Liu, J. Y.; Huba, J. D.; Chen, A. B.; Hsu, R. R.; Chen, Y. T. |
| 國立暨南國際大學 |
2003 |
Low-leakage 0.11 mu m CMOS for low-power RF-ICs and SRAMs applications?
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林佑昇; Lin, YS |
| 國立彰化師範大學 |
2008-12 |
Low-Leakage and Low-Power Implementation of High-Speed 65nm Logic Gates
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Wu, Tsung-Yi; Lu, Liang-Ying; Liang, Cheng-Hsun |
| 國立成功大學 |
2009-04 |
Low-Leakage and Low-Power Implementation of High-Speed Logic Gates
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Wu, Tsung-Yi; Lu, Liang-Ying |
| 國立彰化師範大學 |
2009 |
Low-Leakage and Low-Power Implementation of High-Speed Logic Gates
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Wu, Tsung-Yi ; Lu, Liang-Ying |
| 國立交通大學 |
2017-04-21T06:55:58Z |
Low-Leakage and Low-Trigger-Voltage SCR Device for ESD Protection in 28-nm High-k Metal Gate CMOS Process
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Lin, Chun-Yu; Wu, Yi-Han; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:56:27Z |
Low-Leakage Bidirectional SCR With Symmetrical Trigger Circuit for ESD Protection in 40-nm CMOS Process
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Altolaguirre, Federico A.; Ker, Ming-Dou |
| 國立成功大學 |
2020 |
Low-Leakage Capacitive Coupling Structure for a-Si:H Gate Driver With Less Delay of Clock Signals Used in AMLCDs
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Deng;Ming-Yang;Liao;Wei-Sheng;Chen;Sung-Chun;Chang;Jui-Hung;Wu;Chia-En;Lin;Chih-Lung |
显示项目 558696-558705 / 2348971 (共234898页)
<< < 55865 55866 55867 55868 55869 55870 55871 55872 55873 55874 > >>
每页显示[10|25|50]项目
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