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显示项目 92436-92445 / 2348973 (共234898页)
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| 國立交通大學 |
2020-05-05T00:02:26Z |
A 75-Gb/s/mm(2) and Energy-Efficient LDPC Decoder Based on a Reduced Complexity Second Minimum Approximation Min-Sum Algorithm
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Jou, Shyh-Jye Jerry; Chiu, Kang-Lun; Tsai, Pei-Yun; Lopez, Henry; Chan, Hsun-Wei |
| 國立臺灣大學 |
2008-06 |
A 75-GHz Phase-Locked Loop in 90-nm CMOS Technique
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Lee, Jri; Liu, M.; Wang, H. |
| 國立臺灣大學 |
2008 |
A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology
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Lee, Jri; Liu, Mingchung; Wang, Huaide |
| 臺大學術典藏 |
2020-06-11T07:06:09Z |
A 75-GHz phase-locked loop in 90-nm CMOS technology
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Lee, J.;Liu, M.;Wang, H.; Lee, J.; Liu, M.; Wang, H.; JRI LEE |
| 中國醫藥大學 |
2006-04 |
A 75-year-old woman with atrialflutter s/p rf catheter ablation presented with progressive dyspnea for one week
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林圀宏(Kuo-Hung Lin) |
| 國立成功大學 |
2019 |
A 75.3-dB SNDR 24-MS/s Ring Amplifier-Based Pipelined ADC Using Averaging Correlated Level Shifting and Reference Swapping for Reducing Errors From Finite Opamp Gain and Capacitor Mismatch
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Hung, T.-C.;Kuo, T.-H. |
| 臺大學術典藏 |
2012 |
A 75.5-to-120.5-GHz, high-gain CMOS low-noise amplifier
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Lu, D.-R.; Hsu, Y.-C.; Kao, J.-C.; Kuo, J.-J.; Niu, D.-C.; Lin, K.-Y.; KUN-YOU LIN |
| 臺大學術典藏 |
2018-09-10T06:37:57Z |
A 75GHz PLL in 90nmCMOS
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Jri Lee; JRI LEE |
| 臺大學術典藏 |
2018-09-10T08:42:24Z |
A 75μW, 16-channel neural spike-sorting processor with unsupervised clustering
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Karkare, V.;Gibson, S.;Yang, C.-H.;Chen, H.;Markovi?, D.; Karkare, V.; Gibson, S.; Yang, C.-H.; Chen, H.; Markovi?, D.; CHIA-HSIANG YANG |
| 國立臺灣大學 |
2009 |
A 77 GHz CMOS Injection-locked Miller frequency divider
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Luo, T.-N.; Bai, S.-Y.; Chen, Y.-J.E. |
显示项目 92436-92445 / 2348973 (共234898页)
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