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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 276731-276740 / 2348973 (共234898頁)
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每頁顯示[10|25|50]項目
| 國立交通大學 |
2015-07-21T11:21:05Z |
Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs
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Shih, Wen-Li; You, Yi-Ping; Huang, Chung-Wen; Lee, Jenq Kuen |
| 國立暨南國際大學 |
2003 |
Compiler optimization on VLIW instruction scheduling for low power?
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蔡錫鈞; Tsai, SC |
| 國立臺灣科技大學 |
2002 |
Compiler Optimizations with DSP-Specific Semantic Descriptions
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Lin, Yung-Chia;Hwang, Yuan-Shin;Lee, Jenq Kuen |
| 國立臺灣科技大學 |
2003 |
Compiler Support for Speculative Multithreading Architecture with Probabilistic Points-to Analysis
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Chen, Peng-Sheng;Hung, Ming-Yu;Hwang, Yuan-Shin;Ju, Roy Dz-Ching ;Lee, Jenq Kuen |
| 國立臺灣大學 |
1991-11 |
Compiler Techniques for Extracting Loop-Level Parallelism
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王勝德; Wang, C. M.; Wang, Seng-De; Wang, C. M. |
| 臺大學術典藏 |
2020-06-04T07:51:31Z |
Compiler techniques for maximizing fine-grain and coarse-grain parallelism in loops with uniform dependence
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Chen, Y.-S.;Wang, S.-D.;Wang, C.-M.; Chen, Y.-S.; Wang, S.-D.; Wang, C.-M.; SHENG-DE WANG |
| 臺大學術典藏 |
1994-07 |
Compiler Techniques for Maximizing Fine-Grain and Coarse-Grain Parallelism in Loops with Uniform Dependenceds
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Chen, Y. S.; Wang, Seng-De; 王勝德; Chen, Y. S.; Wang, Seng-De |
| 國立臺灣大學 |
1994-07 |
Compiler Techniques for Maximizing Fine-Grain and Coarse-Grain Parallelism in Loops with Uniform Dependenceds
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王勝德; Chen, Y. S.; 王勝德; Wang, Seng-De; Chen, Y. S.; Wang, Seng-De |
| 臺大學術典藏 |
2007-04-19T04:35:31Z |
Compiler techniques to extract parallelism within a nested loop
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Wang,Chien-Min;Wang, Sheng-De; Wang,Chien-Min; Wang, Sheng-De |
| 國立臺灣大學 |
1991-09 |
Compiler techniques to extract parallelism within a nested loop
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Wang,Chien-Min; Wang, Sheng-De |
顯示項目 276731-276740 / 2348973 (共234898頁)
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每頁顯示[10|25|50]項目
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