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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 554011-554020 / 2348971 (共234898頁)
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| 國立交通大學 |
2017-04-21T06:50:00Z |
Logic Block and Design Methodology for Via-Configurable Structured ASIC Using Dual Supply Voltages
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Lin, Ta-Kai; Lin, Kuen-Wey; Chiu, Chang-Hao; Lin, Rung-Bin |
| 義守大學 |
2010-09 |
Logic Circuit Design by Neural NeTwork and PSO Algorithm
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Jen-Pin Yang;Chih-Kung Kung;Fang-Tsung Liu;Yu-Ju Chen;Chuo-Yean Chang;Rey-Chue Hwang |
| 國立政治大學 |
2017 |
Logic control for story graphs in 3D game narratives
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Wu, Hui-Yin;Li, Tsai-Yen;Christie, Marc; 李蔡彥 |
| 國立臺灣海洋大學 |
2014 |
Logic Control of Enzyme-Like Gold Nanoparticles for Selective Detection of Lead and Mercury Ions
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Chia-Wen Lien;Yu-Ting Tseng;Chih-Ching Huang;Huan-Tsung Chang |
| 臺大學術典藏 |
2018-09-10T14:59:40Z |
Logic control of enzyme-like gold nanoparticles for selective detection of lead and mercury ions
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Lien, C.-W.; Tseng, Y.-T.; Huang, C.-C.; Chang, H.-T.; Lien, C.-W.; Tseng, Y.-T.; Huang, C.-C.; Chang, H.-T.; HUAN-TSUNG CHANG |
| 元智大學 |
2018-03-19 |
Logic Optimization with Considering Boolean Relations
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陳勇志; Tung-Yuan Lee; Chia-Cheng Wu; Chia-Chun Lin; Chun-Yao Wang |
| 元智大學 |
2010-12 |
Logic Performance of 40 nm InAslInxGat_xAs Composite Channel HEMTs
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Faiz Aizad; Heng-Tung Hsu; Chien-I Kuo; Li-Han Hsu; Chien-Ying Wu; Edward Yi; Guo-Wei Huang; Szu-ping Tsai |
| 元智大學 |
2010-12 |
Logic Performance of 40 nm InAslInxGat_xAs Composite Channel HEMTs
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Faiz Aizad; Heng-Tung Hsu; Chien-I Kuo; Li-Han Hsu; Chien-Ying Wu; Edward Yi; Guo-Wei Huang; Szu-ping Tsai |
| 元智大學 |
2010-12 |
Logic Performance of 40 nm InAslInxGat_xAs Composite Channel HEMTs
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Faiz Aizad; Heng-Tung Hsu; Chien-I Kuo; Li-Han Hsu; Chien-Ying Wu; Edward Yi; Guo-Wei Huang; Szu-ping Tsai |
| 臺大學術典藏 |
2018-09-10T03:46:51Z |
Logic Programming with Recurrence Domains
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JIEH HSIANG; JIEH HSIANG; JIEH HSIANG |
顯示項目 554011-554020 / 2348971 (共234898頁)
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每頁顯示[10|25|50]項目
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