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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 916711-916720 / 2348570 (共234857頁)
<< < 91667 91668 91669 91670 91671 91672 91673 91674 91675 91676 > >>
每頁顯示[10|25|50]項目
| 國立交通大學 |
2014-12-08T15:01:53Z |
VLSI cell placement on arbitrarily-shaped rectilinear regions using neural networks with calibration nodes - Comments
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Huang, KY |
| 國立中山大學 |
2001-09 |
VLSI circuit design of 16-Mbps IrDA VFIR transceivers
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C.C. Wang;C.W. Chen;Y.L. Huang |
| 國立交通大學 |
2014-12-08T15:01:29Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
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Chang, RI; Hsiao, PY |
| 國立交通大學 |
2019-04-02T05:59:32Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
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Chang, RI; Hsiao, PY |
| 臺大學術典藏 |
2018-09-10T06:32:26Z |
VLSI circuit placement with rectilinear modules using three-layer force-directed self-organizing maps
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RAY-I CHANG;HSIAO, PY;CHANG, RI; CHANG, RI; HSIAO, PY; RAY-I CHANG |
| 臺大學術典藏 |
2018-09-10T08:34:15Z |
VLSI design and implementation of density-based spike classification for neuroprosthetic applications
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Cheng, L.-F.;Chen, T.-C.;Chen, L.-G.; Cheng, L.-F.; Chen, T.-C.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立聯合大學 |
2004 |
VLSI Design and Implementation of The Re-configurable 2-D Von Neumann Cellular Automata Bases Generator for The Image Processing Applications
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陳榮堅, 賴瑞麟 |
| 國立交通大學 |
2014-12-08T15:46:11Z |
VLSI design for high-speed LZ-based data compression
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Chen, JM; Wei, CH |
| 國立中山大學 |
1998-06 |
VLSI design of A 1.0 GHz 0.6-µm 8-Bit CLA using PLA-styled all-N-transistor Logic
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C.C. Wang;K.C. Tsai |
| 國立交通大學 |
2014-12-08T15:27:27Z |
VLSI design of a priority arbitrator for shared buffer ATM switches
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Lin, YS; Yang, SC; Fang, SJ; Shung, CB |
顯示項目 916711-916720 / 2348570 (共234857頁)
<< < 91667 91668 91669 91670 91671 91672 91673 91674 91675 91676 > >>
每頁顯示[10|25|50]項目
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