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Showing items 202011-202035 of 2348617 (93945 Page(s) Totally)
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| 國立臺灣大學 |
2003-07 |
Architecture design for deblocking filter in H.264/JVT/AVC
|
Huang, Yu-Wen; Chen, To-Wei; Hsieh, Bing-Yu; Wang, Tu-Chih; Chang, Te-Hao; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:27:47Z |
Architecture design for deblocking filter in H.264/JVT/AVC
|
Huang, Y.-W.; Chen, T.-W.; Hsieh, B.-Y.; Wang, T.-C.; Chang, T.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2000-06 |
Architecture design of an MPEG-4 system
|
Tung, Yi-Shin; Wu, Ja-Ling; Ho, Chia-Chiang; Tung, Yi-Shin; Wu, Ja-Ling; Ho, Chia-Chiang |
| 國立臺灣大學 |
2000-06 |
Architecture design of an MPEG-4 system
|
Tung, Yi-Shin; Wu, Ja-Ling; Ho, Chia-Chiang |
| 國立臺灣大學 |
2000-06 |
Architecture design of an MPEG-4 system
|
Tung, Y-S; Wu, Ja-Ling; Ho, C-C |
| 臺大學術典藏 |
2018-09-10T05:50:32Z |
Architecture design of area-efficient SRAM-based multi-symbol arithmetic encoder in H.264/AVC
|
Chen, Y.-J.; Tsai, C.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立交通大學 |
2014-12-08T15:47:50Z |
Architecture Design of Belief Propagation for Real-Time Disparity Estimation
|
Tseng, Yu-Cheng; Chang, Tian-Sheuan |
| 國立交通大學 |
2019-04-02T06:00:22Z |
Architecture Design of Belief Propagation for Real-Time Disparity Estimation
|
Tseng, Yu-Cheng; Chang, Tian-Sheuan |
| 臺大學術典藏 |
2006-09 |
Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC
|
Chen, Tung-Chien; Huang, Yu-Wen; Tsai, Chuan-Yung; Hsieh, Bing-Yu; Chen, Liang-Gee; Chen, Tung-Chien; Huang, Yu-Wen; Tsai, Chuan-Yung; Hsieh, Bing-Yu; Chen, Liang-Gee |
| 國立臺灣大學 |
2006-09 |
Architecture Design of Context-Based Adaptive Variable-Length Coding for H.264/AVC
|
Chen, Tung-Chien; Huang, Yu-Wen; Tsai, Chuan-Yung; Hsieh, Bing-Yu; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T05:50:32Z |
Architecture design of context-based adaptive variable-length coding for H.264/AVC
|
Chen, T.-C.; Huang, Y.-W.; Tsai, C.-Y.; Hsieh, B.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 臺大學術典藏 |
2020-06-16T06:38:10Z |
Architecture Design of Convolutional Neural Networks for Face Detection on an FPGA Platform
|
Yu, B.-S.;Tsao, Y.;Yang, S.-W.;Chen, Y.-K.;Chien, S.-Y.; Yu, B.-S.; Tsao, Y.; Yang, S.-W.; Chen, Y.-K.; Chien, S.-Y.; SHAO-YI CHIEN |
| 臺大學術典藏 |
2018-09-10T08:14:55Z |
Architecture design of fine grain quality scalable encoder with CABAC for H.264/AVC scalable extension
|
Chuang, T.-D.;Chen, Y.-J.;Chen, Y.-H.;Chien, S.-Y.;Chen, L.-G.; Chuang, T.-D.; Chen, Y.-J.; Chen, Y.-H.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; SHAO-YI CHIEN |
| 國立臺灣大學 |
2007 |
Architecture design of fine grain snr scalable encoder with CABAC for H.264/AVC scalable extension
|
Chen, Yu-Jen; Chen, Yi-Hau; Chuang, Tzu-Der; Li, Chung-Te; Chien, Shao-Yi; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T06:30:58Z |
Architecture design of fine grain SNR scalable encoder with CABAC for H.264/AVC scalable extension
|
Chen, Y.-J.; Chen, Y.-H.; Chuang, T.-D.; Li, C.-T.; Chien, S.-Y.; Chen, L.-G.; LIANG-GEE CHEN; SHAO-YI CHIEN |
| 國立交通大學 |
2014-12-08T15:11:05Z |
Architecture design of full HD JPEG XR encoder for digital photography applications
|
Pan, Chia-Ho; Chien, Ching-Yen; Chao, Wei-Min; Huang, Sheng-Chieh; Chen, Liang-Gee |
| 國立臺灣大學 |
2008 |
Architecture design of full HD JPEG XR encoder for digital photography applications
|
Pan, Chia-Ho; Chien, Ching-Yen; Chao, Wei-Min; Huang, Sheng-Chieh; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T06:54:36Z |
Architecture design of full HD JPEG XR encoder for digital photography applications
|
Huang, S.-C.; Chen, L.-G.; LIANG-GEE CHEN; Pan, C.-H.; Chien, C.-Y.; Chao, W.-M. |
| 國立臺灣大學 |
2005-05 |
Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos
|
Chen, To-Wei; Huang, Yu-Wen; Chen, Tung-Chien; Chen, Yu-Han; Tsai, Chuan-Yung; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T05:15:49Z |
Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videos
|
Chen, T.-W.; Huang, Y.-W.; Chen, T.-C.; Chen, Y.-H.; Tsai, C.-Y.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立聯合大學 |
2009 |
Architecture Design of High Efficient and Non-memory AES Crypto Core for WPAN
|
Rong-Jian Chen, Yu-Cheng Peng, Jui-Lin Lai, and Shi-Jinn Horng, |
| 國立臺灣科技大學 |
2009 |
Architecture design of high efficient and non-memory AES crypto core for WPAN
|
Chen R.-J.; Peng Y.-C.; Lai J.-L.; Horng S.-J. |
| 臺大學術典藏 |
2018-09-10T06:54:36Z |
Architecture design of high performance embedded compression for high definition video coding
|
Chen, W.-Y.;Ding, L.-F.;Tsung, P.-K.;Chen, L.-G.; Chen, W.-Y.; Ding, L.-F.; Tsung, P.-K.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立臺灣科技大學 |
2011 |
Architecture design of high-efficient and non-memory AES crypto-core for WPAN
|
Chen, R.J.;Lin, J.J.;Hung, S.M.;Lai, J.L.;Horng, S.J. |
| 臺大學術典藏 |
2018-09-10T05:50:31Z |
Architecture design of low power integer motion estimation for H.264/AVC
|
Chen, T.-C.; Chen, Y.-H.; Tsai, S.-F.; Chen, L.-G.; LIANG-GEE CHEN |
Showing items 202011-202035 of 2348617 (93945 Page(s) Totally)
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