臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

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Institution	Date	Title	Author
國立成功大學	2023-11	Design and Analysis of Consequent-Pole Permanent Magnet Vernier Motor With Cancellation of Even-Order Harmonics	Hsieh;Min-Fu;Chang;Chia-Yuan;Huynh;Thanh-Anh;Dorrell;D, G.
國立交通大學	2014-12-08T15:11:08Z	Design and analysis of contention-based request schemes for best-effort traffics in IEEE 802.16 networks	Chen, Lien-Wu; Tseng, Yu-Chee
朝陽科技大學	2020-02	Design and Analysis of Coupled-Inductor Switched-Capacitor Boost DC-AC Inverter	張原豪;廖俊嘉
臺大學術典藏	2018-09-10T04:55:24Z	Design and analysis of DC-to-14-GHz and 22-GHz CMOS cascode	Ren-Chieh Liu; Chin-Shen Lin; Kuo-Liang Deng; Huei Wang; HUEI WANG
國立臺灣大學	2004	Design and analysis of DC-to-14-GHz and 22-GHz CMOS cascode distributed amplifiers	Liu, Ren-Chieh; Lin, Chin-Shen; Deng, Kuo-Liang; Wang, Huei
國立交通大學	2018-08-21T05:56:38Z	Design and Analysis of Deadline and Budget Constrained Autoscaling (DBCA) Algorithm for 5G Mobile Networks	Than Phung-Duc; Ren, Yi; Chen, Jyh-Cheng; Yu, Zheng-Wei
臺大學術典藏	1992-01	Design and analysis of defect tolerant hierarchical sorting networks	Kuo, Sy-Yen; Liang, Sheng-Chiech; Kuo, Sy-Yen; Liang, Sheng-Chiech
國立臺灣大學	1992-01	Design and analysis of defect tolerant hierarchical sorting networks	Kuo, Sy-Yen; Liang, Sheng-Chiech
國立臺灣大學	1989	Design and Analysis of Defect Tolerant Hierarchical Sorting Networks	郭斯彥; Liang, S. C.; Kuo, Sy-Yen; Liang, S. C.
臺大學術典藏	2020-06-11T06:44:46Z	Design and Analysis of Defect Tolerant Hierarchical Sorting Networks	Kuo, S.-Y.;Liang, S.-C.; Kuo, S.-Y.; Liang, S.-C.; SY-YEN KUO

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