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Showing items 461096-461105 of 2348511 (234852 Page(s) Totally)
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| 國立臺灣大學 |
2007 |
Hardware Architecture to Realize Multi-layer Image Processing in Real-time
|
Fu, Li-Chen; Lu Chieh-Lun |
| 亞洲大學 |
2007-12-20 |
Hardware Context Switching Methodology for Dynamically Partially Reconfigurable Systems
|
Trong-Yen Lee; Che-Cheng Hu; Li-Wen Lai; Chia-Chun Tsai and Rong-Shue Hsiao |
| 國立成功大學 |
2016-06 |
Hardware Design and Implementation for Empirical Mode Decomposition
|
Chen, Pei-Yin; Lai, Yen-Chen; Zheng, Ju-Yang |
| 國立臺灣科技大學 |
2017 |
Hardware design for statistical network traffic classifiers
|
Lu, C.-N;Lai, Y.-C;Huang, C.-Y;Lin, Y.-D. |
| 國立交通大學 |
2018-08-21T05:56:54Z |
Hardware Design for Statistical Network Traffic Classifiers
|
Lu, Chun-Nan; Lai, Yuan-Cheng; Huang, Chun-Ying; Lin, Ying-Dar |
| 國立彰化師範大學 |
1995 |
Hardware Design of A Real-Time Petri Net Model for Real-Time Tasks
|
黃其泮;何正信 |
| 國立成功大學 |
2018-11 |
Hardware Design of an Energy-Efficient High-Throughput Median Filter
|
Lin;Shih-Hsiang;Chen;Pei-Yin;Lin;Chang-Hsing |
| 國立臺灣科技大學 |
2010 |
Hardware design of features extraction using wavelet packet method for intelligent diagnostic system
|
Huang C.-C.; Huang C.-H.; Tsao Y.-M.; Huang S.-C.; Huang H.-L. |
| 國立成功大學 |
2017-08-1 |
Hardware Design of Low-Power High-Throughput Sorting Unit
|
Lin;Shih-Hsiang;Chen;Pei-Yin;Lin;Yu-Ning |
| 國立臺灣大學 |
1997-06 |
Hardware efficient design of filter banks for video coding
|
Wu, Po-Cheng; Chen, Liang-Gee; Liu, Yuan-Chen; Lai, Yeong-Kang |
Showing items 461096-461105 of 2348511 (234852 Page(s) Totally)
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