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Showing items 558786-558795 of 2348570 (234857 Page(s) Totally)
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| 國立成功大學 |
2008-02 |
Low-power circuit techniques for low-voltage pipelined ADCs based on switched-opamp architecture
|
Ou, Hsin-Hung; Chang, Soon-Jyh; Liu, Bin-Da |
| 國立臺灣大學 |
1999 |
Low-power clock-deskew buffer for high-speed digital circuits
|
Liu, Shen-Iuan; Lee, Jiunn-Hwa; Tsao, Hen-Wai |
| 臺大學術典藏 |
2018-09-10T07:41:56Z |
Low-power clock-deskew buffer for high-speed digital circuits
|
Shen-Iuan Liu; Jiunn-Hwa Lee; Hen-Wai Tsao; HEN-WAI TSAO; SHEN-IUAN LIU |
| 國立交通大學 |
2018-08-21T05:56:49Z |
Low-Power CMOS Bandpass Filter for Application of Cochlear Prosthesis
|
Chu, Hsing-Chien; Huang, Yu-Hua; Hung, Chung-Chih |
| 元智大學 |
2017-06-29 |
Low-Power CMOS LNA 900-MHz LoRa Application Through Parallel-RC Feedback
|
Cheng-Shian Shiau; Jeng-Rern Yang |
| 元智大學 |
2017-06-29 |
Low-Power CMOS LNA 900-MHz LoRa Application Through Parallel-RC Feedback
|
Cheng-Shian Shiau; Jeng-Rern Yang |
| 國立交通大學 |
2016-03-28T00:04:07Z |
Low-power CMOS voltage-controlled oscillator with voltage-controlled inductor for V-band wireless personal area network communication systems
|
Huang, Zhe-Yang; Chen, Chun-Chieh; Hung, Chung-Chih |
| 國立成功大學 |
2012-06 |
Low-power context-based adaptive binary arithmetic encoder using an embedded cache
|
Lei, S. -F.; Lo, C. -C.; Kuo, C. -C.; Shieh, M. -D. |
| 國立交通大學 |
2014-12-08T15:25:28Z |
Low-power data address bus encoding method
|
Weng, TH; Chiao, WH; Shann, JJJ; Chung, CP; Lu, J |
| 臺大學術典藏 |
2018-09-10T06:38:17Z |
Low-power delay buffer circuit
|
T. D. Chiueh; P. C. Hsieh; TZI-DAR CHIUEH |
Showing items 558786-558795 of 2348570 (234857 Page(s) Totally)
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