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臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)
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Institution Date Title Author
國立交通大學 2019-04-02T05:59:06Z On-Chip HBM and HMM ESD Protection Design for RF Applications in 40-nm CMOS Process Chen, Jie-Ting; Lin, Chun-Yu; Chang, Rong-Kun; Ker, Ming-Dou
臺大學術典藏 2019-12-24T09:06:16Z On-chip hematocrit correction for whole blood glucose amperometric sensing strip using a post-measurement potential step Weng C.-W.; Cheng T.-J.; Chen R.L.C.; Hsieh B.-C.; RICHIE CHEN
臺大學術典藏 2019-12-24T09:06:27Z On-chip hematocrit correction for whole blood glucose amperometric sensing strip using a post-measurement potential step Weng C.-W.; Cheng T.-J.; Chen R.L.C.; Hsieh B.-C.; TZONG-JIH CHENG
國立交通大學 2014-12-08T15:25:20Z On-chip high-voltage charge pump circuit in standard CMOS processes with polysilicon diodes Ker, Ming-Dou; Chen, Shih-Lun
國立交通大學 2014-12-16T06:14:05Z On-chip inductor structure and method for manufacturing the same Chao Tzu-Yuan; Hsu Ming-Chieh; Cheng Yu-Ting; Chen Chih; Lin Chien-Min
國立交通大學 2014-12-16T06:15:27Z ON-CHIP INDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME CHAO, TZU-YUAN; HSU, MING-CHIEH; CHENG, YU-TING; CHEN, CHIH; LIU, CHIEN-MIN
國立臺灣科技大學 2016 On-chip liquid detector using synthesized transmission line on integrated passive device process Chen, H.H;Chu, H.N;Ma, T.-G.
國立交通大學 2014-12-08T15:01:44Z On-chip memory module designs for video-signal processing Chang, TS; Jen, CW
國立交通大學 2019-04-02T05:59:54Z On-chip memory module designs for video-signal processing Chang, TS; Jen, CW
國立臺灣大學 2007 On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform Cheng, Chih-Chi; Huang, Chao-Tsung; Chen, Ching-Yeh; Lian, Chung-Jr; Chen, Liang-Gee
國立交通大學 2020-05-05T00:02:24Z On-chip MIC by Combining Concentration Gradient Generator and Flanged Chamber Arrays Sun, Kai; Ren, Nan-Qi; Li, Zhe-Yu; Ueno, Kose; Misawa, Hiroaki; Zhang, Xiao-Yan
國立臺灣科技大學 2014 On-chip miniaturised wideband rat-race coupler using integrated passive device technology Tseng, Y.-C.;Ma, T.-G.
國立臺灣科技大學 2014 On-chip miniaturized 3-dB directional coupler using coupled synthesized CPWs on integrated passive device (IPD) process Tseng, Y.-C.;Ma, T.-G.
國立臺灣科技大學 2014 On-chip miniaturized diplexer using jointed dual-mode right-/left-handed synthesized coplanar waveguides on GIPD process Lai, C.-H.;Zhou, G.-T.;Ma, T.-G.
國立臺灣科技大學 2014 On-chip miniaturized triplexer using lumped networks with dual resonators on an integrated passive device process Lai, C.-H.;Chung, W.-S.;Ma, T.-G.
國立交通大學 2014-12-16T06:13:54Z On-chip noise filter circuit Ker Ming-Dou; Yen Cheng-Cheng; Chen Tung-Yang
國立交通大學 2014-12-16T06:15:06Z On-Chip Noise Filter Circuit Ker Ming-Dou; Yen Cheng-Cheng; Chen Tung-Yang
臺大學術典藏 2022-01-15T00:08:40Z On-Chip Optical Routing with Provably Good Algorithms for Path Clustering and Assignment Lu, Yu Sheng; Yu, Sheng Jung; YAO-WEN CHANG
臺大學術典藏 2022-04-14T23:28:00Z On-chip Optical Routing with Waveguide Matching Constraints Chuang, Fu Yu; YAO-WEN CHANG
國立交通大學 2020-10-05T02:01:07Z On-Chip Over-Voltage Protection Design Against Surge Events on the CC Pin of USB Type-C Interface Ke, Chao-Yang; Ker, Ming-Dou
臺大學術典藏 2018-09-10T07:26:40Z On-chip principal component analysis with a mean pre-estimation method for spike sorting Chen, T.-C.;Chen, K.;Liu, W.;Chen, L.-G.; Chen, T.-C.; Chen, K.; Liu, W.; Chen, L.-G.; LIANG-GEE CHEN
國立臺灣大學 2006 On-Chip Random Jitter Testing Using Low Tap-Count Coarse Delay Lines Huang, Jiun-Lang
臺大學術典藏 2018-09-10T06:03:13Z On-Chip Random Jitter Testing Using Low Tap-Count Coarse Delay Lines J.-L. Huang; JIUN-LANG HUANG
國立成功大學 2018 On-chip real-time feature extraction using semantic annotations for object recognition Yu, Yu Y.-H.;Lee, T.-T.;Chen, P.-Y.;Kwok, N.
國立成功大學 2014-08 On-Chip Sample Preparation for Multiple Targets Using Digital Microfluidics Mitra, Debasis; Roy, Sudip; Bhattacharjee, Sukanta; Chakrabarty, Krishnendu; Bhattacharya, Bhargab B.

Showing items 634206-634230 of 2348685  (93948 Page(s) Totally)
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