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Showing items 649846-649870 of 2348638 (93946 Page(s) Totally)
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| 國立交通大學 |
2014-12-08T15:07:13Z |
PARALLEL GENERATION OF BINARY SEARCH TREES
|
WONG, CK; CHANG, SK |
| 臺大學術典藏 |
2009-02-03T07:50:34Z |
Parallel Generation of Permutations and Combinations
|
Chern, M. S.; Chen, Gen-Huey; Chern, M. S.; 陳健輝; Chen, Gen-Huey; Chern, M. S. |
| 國立臺灣大學 |
1987 |
Parallel Generation of Permutations and Combinations
|
陳健輝; Chern, M. S.; Chen, Gen-Huey; Chern, M. S. |
| 臺大學術典藏 |
1985 |
Parallel Generation of Permutations and Combinations.
|
陳健輝;Chern, M. S.; Chen, Gen-Huey;Chern, M. S.; 陳健輝; Chern, M. S.; Chen, Gen-Huey |
| 國立臺灣大學 |
1985 |
Parallel Generation of Permutations and Combinations.
|
陳健輝; Chern, M. S.; Chen, Gen-Huey; Chern, M. S. |
| 國立交通大學 |
2014-12-08T15:05:30Z |
PARALLEL GENERATION OF PERMUTATIONS ON SYSTOLIC ARRAYS
|
LIN, CJ |
| 國立交通大學 |
2014-12-08T15:10:16Z |
Parallel Genetic Algorithm for Intelligent Model Parameter Extraction of Metal-Oxide-Semiconductor Field Effect Transistors
|
Li, Yiming |
| 臺大學術典藏 |
2004-05 |
Parallel global elimination algorithm and architecture design for fast block matching motion estimation
|
Huang, Yu-Wen; Tsai, Chen-Han; Chen, Liang-Gee; Huang, Yu-Wen; Tsai, Chen-Han; Chen, Liang-Gee |
| 國立臺灣大學 |
2004-05 |
Parallel global elimination algorithm and architecture design for fast block matching motion estimation
|
Huang, Yu-Wen; Tsai, Chen-Han; Chen, Liang-Gee |
| 臺大學術典藏 |
2018-09-10T04:47:17Z |
Parallel global elimination algorithm and architecture design for fast block matching motion estimation
|
Huang, Y.-W.; Tsai, C.-H.; Chen, L.-G.; Huang, Y.-W.; Tsai, C.-H.; Chen, L.-G.; LIANG-GEE CHEN |
| 國立中山大學 |
1990 |
Parallel Graph Algorithms Based upon Broadcast Communications
|
Chang-Biau Yang;R.C.T. Lee;W.T. Chen |
| 臺大學術典藏 |
2018-09-10T05:00:09Z |
Parallel graph contraction with applications to a reconfigurable parallel architecture
|
Lyuu, Y.-D.;Schenfeld, E.; Lyuu, Y.-D.; Schenfeld, E.; YUH-DAUH LYUU |
| 臺大學術典藏 |
2020-05-04T08:21:25Z |
Parallel Graph Contraction with Applications to a Reconfigurable Parallel Architecture.
|
Lyuu, Yuh-Dauh;Schenfeld, Eugen; Lyuu, Yuh-Dauh; Schenfeld, Eugen; YUH-DAUH LYUU |
| 元智大學 |
Jan-20 |
Parallel hardware implementation of data hiding scheme for quality access control of grayscale image based on FPGA
|
Amit Phadikar; Himadri Mandal; Tien-Lung Chiu |
| 國立臺灣科技大學 |
1997 |
Parallel hierarchical clustering algorithms on processor arrays with a reconfigurable bus system
|
Tsai, H. R. ;Horng, S. J.;Lee, S. S. ;Tsai, S. S. ;Kao, T. W. |
| 國家衛生研究院 |
1998-06-15 |
Parallel hybridization analysis of multiple protein kinase genes: Identification of gene expression patterns characteristic of human hepatocellular carcinoma
|
Tsou, AP; Wu, KM; Tsen, TY; Chi, CW; Chiu, JH; Lui, WY; Hu, CP; Chang, CM; Chou, CK; Tsai, SF |
| 臺大學術典藏 |
2018-09-10T04:47:45Z |
Parallel identification of O-GlcNAc-modified proteins from cell lysates
|
Tai, H.-C.;Khidekel, N.;Ficarro, S.B.;Peters, E.C.;Hsieh-Wilson, L.C.; Tai, H.-C.; Khidekel, N.; Ficarro, S.B.; Peters, E.C.; Hsieh-Wilson, L.C.; HWAN-CHING TAI |
| 國立臺灣大學 |
1992 |
Parallel Image and Video Coding Schemes in Multi-Computers
|
Duh, Wei-Jou; Wu, Ja-Ling |
| 國立臺灣大學 |
1992-11 |
Parallel implementation of a control method for solving PDEs on the sphere
|
Chern, I-L.; Foster, I. |
| 國立臺灣大學 |
1991 |
Parallel Implementation of a Control Volume Method for Solving PDEs on the Sphere
|
陳宜良; Foster, Ian; Chern, I-Liang; Foster, Ian |
| 國立交通大學 |
2014-12-08T15:15:13Z |
Parallel implementation of a three-dimensional electrostatic PIC-MCC method using an unstructured tetrahedral mesh
|
Wu, J. -S.; Hsu, K. -H. |
| 佛光大學 |
1999 |
Parallel Implementation of Artificial Neural Networks for the Diagnosis of Coronary Artery Disease
|
夏傳儀;W. K. Tang |
| 佛光大學 |
1999-08-01 |
Parallel Implementation of Artificial Neural Networks for the Diagnosis of Coronary Artery Disease
|
夏傳儀;W. K. Tang |
| 國立臺灣海洋大學 |
2009-07 |
Parallel Implementation of Convolution Encoder for Software Defined Radio on DSP Architecture
|
Jui-Chieh Lin;Chu Yu;Mao-Hsu Yen;Pao-Ann Hsiung;Sao-Jie Chen;Yu Hen Hu |
| 臺大學術典藏 |
2018-09-10T07:36:33Z |
Parallel implementation of convolution encoder for software defined radio on DSP architecture
|
SAO-JIE CHEN; Hu, Y.H.; Lin, J.-C.;Yu, C.;Yen, M.-H.;Hsiung, P.-A.;Chen, S.-J.;Hu, Y.H.; Lin, J.-C.; Yu, C.; Yen, M.-H.; Hsiung, P.-A.; Chen, S.-J. |
Showing items 649846-649870 of 2348638 (93946 Page(s) Totally)
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