臺灣學術機構典藏系統 (Taiwan Academic Institutional Repository, TAIR)

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	2019臺灣學術機構典藏研討會
	機構典藏系統RC7版本已發佈

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Institution	Date	Title	Author
國立交通大學	2014-12-08T15:29:24Z	A 10-Bit 300-MS/s Pipelined ADC With Digital Calibration and Digital Bias Generation	Fang, Bing-Nan; Wu, Jieh-Tsorng
國立臺灣科技大學	2015	A 10-bit 40 MS/s successive approximation register analog-to-digital converter with Vcm-based method for wireless communications	Lai, W.C.
國立臺灣科技大學	2016	A 10-bit 40 MS/s successive approximation register analog-to-digital converter with Vcm-based method for wireless communications	Lai, W.C.
臺大學術典藏	2020-06-11T06:34:55Z	A 10-bit 40-MS/s Time-Domain Two-Step ADC with Short Calibration Time	Chen, L.-J.;Liu, S.-I.; Chen, L.-J.; Liu, S.-I.; SHEN-IUAN LIU
臺大學術典藏	2020-06-11T06:21:00Z	A 10-bit 400-MS/s 36-mW interleaved ADC	Huang, Y.-C.;Lin, C.-Y.;Lee, T.-C.; Huang, Y.-C.; Lin, C.-Y.; Lee, T.-C.; TAI-CHENG LEE
臺大學術典藏	2018-09-10T07:45:58Z	A 10-bit 500-KS/s low power SAR ADC with splitting comparator for bio-medical applications	Nai-Kuan Chou; Pang, W.-Y.; Wang, C.-S.; Chang, Y.-K.; Chou, N.-K.; Wang, C.-K.; Nai-Kuan Chou
臺大學術典藏	2020-03-09T07:30:51Z	A 10-bit 500-KS/s low power SAR ADC with splitting comparator for bio-medical applications	Pang W.-Y.; Wang C.-S.; Chang Y.-K.; NAI-KUAN CHOU; Wang C.-K.
義守大學	1998-08	A 10-Bit 50MHz Analog-to-Digital Converter Using Pipeline Architecture and Current-Mode Techniques	林啟元;Lin, Kai-yuen;涂振嘉;Twu, Chen-chia
淡江大學	2005	A 10-bit 50Msample/s pipelined analog-to-digital converter	黃世麟; Huang, Shih-lin
國立虎尾科技大學	2007	A 10-bit 60-MS/s low-power CMOS pipelined analog-to-digital converter	Lu, Chi-Chang;Lee, Tsung-Sum

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