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Institution Date Title Author
中華大學 2007 Area-Driven Decoupling Capacitance Allocation in Noise-Aware Floorplan for Signal Integrity 顏金泰; YAN, JIN-TAI
中華大學 2006 Area-Driven White Space Distribution for Detailed Floorplan Design 顏金泰; YAN, JIN-TAI
國立交通大學 2014-12-08T15:26:16Z Area-effective FIR filter design for multiplier-less implementation Lin, TJ; Yang, TH; Jen, CW
國立交通大學 2014-12-16T06:13:48Z Area-efficiency delta modulator for quantizing an analog signal Wu Chun-Yu; Lyu Yuan-Fu
國立臺灣海洋大學 2014 Area-Efficient 128- to 2048/1536-Point Pipeline FFT Processor for LTE and Mobile WiMAX Systems Chu Yu;Mao-Hsu Yen
國立交通大學 2015-07-21T08:30:52Z Area-Efficient 2-D Digital Filter Architectures Possessing Diagonal and Four-Fold Rotational Symmetries Chen, Pei-Yu; Van, Lan-Da; Reddy, Hari C.; Khoo, I-Hung
國立交通大學 2016-03-28T00:04:24Z Area-Efficient and Low-Leakage Diode String for On-Chip ESD Protection Lin, Chun-Yu; Wu, Po-Han; Ker, Ming-Dou
國立交通大學 2014-12-08T15:04:34Z AREA-EFFICIENT ARCHITECTURES FOR THE VITERBI ALGORITHM .1. THEORY SHUNG, CB; LIN, HD; CYPHER, R; SIEGEL, PH; THAPAR, HK
國立交通大學 2014-12-08T15:04:32Z AREA-EFFICIENT ARCHITECTURES FOR THE VITERBI ALGORITHM .2. APPLICATIONS SHUNG, CB; LIN, HD; CYPHER, R; SIEGEL, PH; THAPAR, HK
國立中山大學 2001-09 Area-Efficient Carry-Save Full Adder Design Using Pass Transistors Tso-Bing Juan; Ming-Ju Tsia; Shen-Fu Hsiao
國立交通大學 2015-12-02T02:59:12Z Area-Efficient ESD Clamp Circuit With a Capacitance-Boosting Technique to Minimize Standby Leakage Current Altolaguirre, Federico A.; Ker, Ming-Dou
國立交通大學 2014-12-08T15:09:34Z Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs Chen, Shih-Hung; Ker, Ming-Dou
義守大學 2009-05 Area-Efficient ESD-Transient Detection Circuit With Smaller Capacitance for On-Chip Power-Rail ESD Protection in CMOS ICs Shih-Hung Chen;Ming-Dou Ker
國立彰化師範大學 2010-08 Area-Efficient High Goodness-of-Fit Noise Generator for Communication Test Chen, Pin-Chung; Fan, Sheng-Jie; Wang, Yun-Ping; Kao, Yung-Sheng; Huang, Tsung-Chu
國立交通大學 2014-12-08T15:27:06Z Area-Efficient Instruction Set Extension Exploration with Hardware Design Space Exploration Wu, I-Wei; Chung, Chung-Ping; Shann, Jean Jyh-Jiun
國立交通大學 2019-08-02T02:18:28Z Area-Efficient On-Chip Transient Detection Circuit for System-Level ESD Protection Against Transient-Induced Malfunction Chen, Wen-Chieh; Ker, Ming-Dou
國立交通大學 2017-04-21T06:49:47Z Area-Efficient Power-Rail ESD Clamp Circuit with SCR Device Embedded into ESD-Transient Detection Circuit in a 65nm CMOS Process Yeh, Chih-Ting; Ker, Ming-Dou
臺大學術典藏 2011 Area-efficient scalable MAP processor design for high-throughput multistandard convolutional turbo decoding Lin, C.-H.;Chen, C.-Y.;Wu, A.-Y.; Lin, C.-H.; Chen, C.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU
臺大學術典藏 2019-10-24T07:57:12Z Area-Efficient Scalable MAP Processor Design for High-Throughput Multistandard Convolutional Turbo Decoding 吳安宇;AN-YEU(ANDY) WU;An-Yeu Wu;Chun-Yu Chen;Chen-Hung Lin; Chen-Hung Lin; Chun-Yu Chen; An-Yeu Wu; AN-YEU(ANDY) WU; 吳安宇
國立交通大學 2015-07-21T08:31:30Z Area-efficient TFM-based Stochastic Decoder Design for Non-binary LDPC Codes Yang, Chih-Wen; Lee, Xin-Ru; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi
國立彰化師範大學 2008-07 Area-Efficient True One-Period Delay Jitter Measurement Yang, Cheng-Han; Chou, Yi-Hsian; Huang, Tsung-Chu
國立彰化師範大學 2008-08 Area-Efficient True One-Period Delayline for Cycle-to-Cycle Jitter Measurement Yang, Cheng-Han; Chou, Yi-Hsian; Huang, Tsung-Chu
國立成功大學 2023 Area-Efficient VLSI Architecture of Key Switching for BGV Fully Homomorphic Encryption Chen, K.-Y.;Shieh, M.-D.
國立臺灣大學 2004-08 Area-efficient VLSI design of Reed-Solomon decoder for 10GBase-LX4 optical communication systems Hsu, Huai-Yi; Yeo, Jih-Chiang; Wu, An-Yeu
臺大學術典藏 2019-10-24T07:57:16Z Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems 吳安宇;AN-YEU(ANDY) WU;Jih-Chiang Yeo;An-Yeu Wu;Huai-Yi Hsu; Huai-Yi Hsu; An-Yeu Wu; Jih-Chiang Yeo; AN-YEU(ANDY) WU; 吳安宇

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