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Institution	Date	Title	Author
國立聯合大學	2009	Low-power and high-SFDR direct digital frequency synthesizer based on hybrid CORDIC algorithm	Sung, Tze-Yun; Ko, Lyu-Ting; Hsin, Hsi-Chin
中華大學	2009	Low-Power and High-SFDR Direct Digital Frequency Synthesizer Based on Hybrid CORDIC Algorithm	宋志雲; Sung, Tze-Yun
中華大學	2009	Low-Power and High-SFDR Hybrid CORDIC-Based Direct Digital Frequency Synthesizer	宋志雲; Sung, Tze-Yun
中華大學	2006	Low-Power and High-Speed Architectures for 2-D DCT and IDCT Based on CORDIC Rotation	宋志雲; Sung, Tze-Yun
國立聯合大學	2010	Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems	Sung, TY; Hsin, HC; Cheng, YP
中華大學	2010	Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems	宋志雲; Sung, Tze-Yun
臺大學術典藏	2018-09-10T09:24:55Z	Low-Power and High-Throughput Design of Fast Motion Estimation VLSI Architecture for Multimedia System-on-Chip Design	Sy-Yen Kuo;Shih-Chia Huang; Sy-Yen Kuo; Shih-Chia Huang; SY-YEN KUO
國立交通大學	2014-12-08T15:28:51Z	Low-Power and Highly Reliable Multilevel Operation in ZrO(2) 1T1R RRAM	Wu, Ming-Chi; Lin, Yi-Wei; Jang, Wen-Yueh; Lin, Chen-Hsi; Tseng, Tseung-Yuen
國立交通大學	2019-04-02T05:58:57Z	Low-Power and Highly Reliable Multilevel Operation in ZrO2 1T1R RRAM	Wu, Ming-Chi; Lin, Yi-Wei; Jang, Wen-Yueh; Lin, Chen-Hsi; Tseng, Tseung-Yuen
臺大學術典藏	2018-09-10T04:56:07Z	Low-power and low-complexity DCT/IDCT VLSI architecture based on backward chebyshev recursion	Wu, An-Yeu; Liu, K.J.Ray; AN-YEU(ANDY) WU

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