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教育部委託研究計畫 計畫執行:國立臺灣大學圖書館
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顯示項目 558851-558860 / 2348973 (共234898頁)
<< < 55881 55882 55883 55884 55885 55886 55887 55888 55889 55890 > >>
每頁顯示[10|25|50]項目
| 國立聯合大學 |
2009 |
Low-power and high-SFDR direct digital frequency synthesizer based on hybrid CORDIC algorithm
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Sung, Tze-Yun; Ko, Lyu-Ting; Hsin, Hsi-Chin |
| 中華大學 |
2009 |
Low-Power and High-SFDR Direct Digital Frequency Synthesizer Based on Hybrid CORDIC Algorithm
|
宋志雲; Sung, Tze-Yun |
| 中華大學 |
2009 |
Low-Power and High-SFDR Hybrid CORDIC-Based Direct Digital Frequency Synthesizer
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宋志雲; Sung, Tze-Yun |
| 中華大學 |
2006 |
Low-Power and High-Speed Architectures for 2-D DCT and IDCT Based on CORDIC Rotation
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宋志雲; Sung, Tze-Yun |
| 國立聯合大學 |
2010 |
Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems
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Sung, TY; Hsin, HC; Cheng, YP |
| 中華大學 |
2010 |
Low-power and high-speed CORDIC-based split-radix FFT processor for OFDM systems
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宋志雲; Sung, Tze-Yun |
| 臺大學術典藏 |
2018-09-10T09:24:55Z |
Low-Power and High-Throughput Design of Fast Motion Estimation VLSI Architecture for Multimedia System-on-Chip Design
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Sy-Yen Kuo;Shih-Chia Huang; Sy-Yen Kuo; Shih-Chia Huang; SY-YEN KUO |
| 國立交通大學 |
2014-12-08T15:28:51Z |
Low-Power and Highly Reliable Multilevel Operation in ZrO(2) 1T1R RRAM
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Wu, Ming-Chi; Lin, Yi-Wei; Jang, Wen-Yueh; Lin, Chen-Hsi; Tseng, Tseung-Yuen |
| 國立交通大學 |
2019-04-02T05:58:57Z |
Low-Power and Highly Reliable Multilevel Operation in ZrO2 1T1R RRAM
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Wu, Ming-Chi; Lin, Yi-Wei; Jang, Wen-Yueh; Lin, Chen-Hsi; Tseng, Tseung-Yuen |
| 臺大學術典藏 |
2018-09-10T04:56:07Z |
Low-power and low-complexity DCT/IDCT VLSI architecture based on backward chebyshev recursion
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Wu, An-Yeu; Liu, K.J.Ray; AN-YEU(ANDY) WU |
顯示項目 558851-558860 / 2348973 (共234898頁)
<< < 55881 55882 55883 55884 55885 55886 55887 55888 55889 55890 > >>
每頁顯示[10|25|50]項目
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