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显示项目 437096-437105 / 2348973 (共234898页)
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每页显示[10|25|50]项目
| 中華大學 |
2005 |
FPGA Implementation of a High-Speed CORDIC-Based Sine and Cosine Generator for OFDM Systems
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宋志雲; Sung, Tze-Yun |
| 朝陽科技大學 |
2021-06 |
FPGA implementation of a lightweight simple encryption scheme to secure IoT using novel key scheduling technique
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Kumar, Kiran, V. G.;Rai, Shantharama, C. |
| 國立臺灣科技大學 |
2014 |
FPGA implementation of A MASH 1-1-1 delta-sigma modulator infractional-N phase locked loop for fuzzy control application
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Lai W.-C., Huang J.-F., Wen C.-L., Lay W.-T. |
| 國立勤益科技大學 |
2009-03 |
FPGA Implementation of a Recurrent Neural Fuzzy Network with On-Chip Learning for Prediction and Identification Applications
|
林正堅 |
| 國立勤益科技大學 |
2008-05 |
FPGA implementation of a wavelet neural network with particle swarm optimization learning
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Lin, Cheng-Jian ; Tsai, Hung-Ming |
| 淡江大學 |
2019-05-11 |
FPGA implementation of adaptive Kalman filter for industrial ultrasonic applications
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Li, Shih-AN;Li, Chris |
| 元智大學 |
2012-04-19 |
FPGA Implementation of Alamouti MIMO Log-Likelihood Ratio Selection for Receiver-Antenna Selection Combining
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Peiwang Chow; Yawgeng Chau; Guangliang Ren |
| 元智大學 |
2012-04-19 |
FPGA Implementation of Alamouti MIMO Log-Likelihood Ratio Selection for Receiver-Antenna Selection Combining
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Peiwang Chow; Yawgeng Chau; Guangliang Ren |
| 元智大學 |
2004-08 |
FPGA Implementation of an All-Digital T/2-Spaced QPSK Receiver with Farrow Interpolation Timing Synchronizer and Recursive Costas Loop
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黃正光; C. H. Chu |
| 元智大學 |
2004-08 |
FPGA Implementation of an All-Digital T/2-Spaced QPSK Receiver with Farrow Interpolation Timing Synchronizer and Recursive Costas Loop
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黃正光; C. H. Chu |
显示项目 437096-437105 / 2348973 (共234898页)
<< < 43705 43706 43707 43708 43709 43710 43711 43712 43713 43714 > >>
每页显示[10|25|50]项目
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