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显示项目 445661-445685 / 2348570 (共93943页)
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机构 日期 题名 作者
國立交通大學 2017-04-21T06:55:43Z Gate Insulator Morphology-Dependent Reliability in Organic Thin-Film Transistors Chen, Hua-Mao; Chang, Ting-Chang; Tai, Ya-Hsiang; Chiang, Hsiao-Cheng; Liu, Kuan-Hsien; Chen, Min-Chen; Huang, Cheng-Chieh; Lee, Chao-Kuei
臺大學術典藏 2018-09-10T04:28:26Z Gate leakage suppression and contact engineering in nitride heterostructures Wu, YR; Singh, M; Singh, J; YUH-RENN WU
臺大學術典藏 2018-09-10T04:59:04Z Gate Misalignment Effect Related Capacitance Behavior of a 100nm DG FD SOI NMOS Device with n+/p+ Poly Top/Bottom Gate C. H. Hsu; C. P. Yang; JAMES-B KUO; J. B. Kuo
國立成功大學 2020 Gate operation for habitat-oriented water management at Budai Salt Pan Wetland in Taiwan Wang, H.-W.;Kuo, P.-H.;Dodd, A.E.
國立交通大學 2014-12-16T06:14:04Z Gate oxide breakdown-withstanding power switch structure Yang Hao-I; Chuang Ching-Te; Hwang Wei
國立交通大學 2014-12-16T06:15:14Z GATE OXIDE BREAKDOWN-WITHSTANDING POWER SWITCH STRUCTURE YANG Hao-I; Chuang Ching-Te; Hwang Wei
國立交通大學 2014-12-08T15:45:36Z Gate oxide integrity of thermal oxide grown on high temperature formed Si0.3Ge0.7 Wu, YH; Chin, A
國立臺灣大學 2010 Gate oxide wear out using novel polysilazane-base inorganic as nano-scaling shallow trench filling Ho, Ching Yuan; Shih, Kai-Yao; He, Jr Hau
中原大學 2010-04 Gate Oxide Weat out Using Novel Polysilazane-base Inorganic as Nano-scaling Shallow Trench Filling Ching Yuan. Ho;Kai-Yao.Shih ; jr Hau He,
國立交通大學 2014-12-08T15:27:45Z Gate oxynitride grown in N2O and annealed in no using rapid thermal processing Sun, SC; Chen, CH; Lou, JC; Yen, LW; Lin, CJ
國立交通大學 2014-12-08T15:36:34Z Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer Hsieh, Ting-En; Chang, Edward Yi; Song, Yi-Zuo; Lin, Yueh-Chin; Wang, Huan-Chung; Liu, Shin-Chien; Salahuddin, Sayeef; Hu, Chenming Calvin
國立交通大學 2019-04-02T06:00:51Z Gate Recessed Quasi-Normally OFF Al2O3/AlGaN/GaN MIS-HEMT With Low Threshold Voltage Hysteresis Using PEALD AlN Interfacial Passivation Layer Hsieh, Ting-En; Chang, Edward Yi; Song, Yi-Zuo; Lin, Yueh-Chin; Wang, Huan-Chung; Liu, Shin-Chien; Salahuddin, Sayeef; Hu, Chenming Calvin
國立交通大學 2015-12-04T07:03:12Z GATE STRUCTURE CHANG Yi; KUO Chien-I; HSU Heng-Tung
國立成功大學 2017 Gate structure engineering for enhancement-mode AlGaN/GaN MOSHEMT Liu, H.-Y.;Lee, C.-S.;Lin, C.-W.;Chiang, M.-H.;Hsu, W.-C.
國立交通大學 2014-12-16T06:16:19Z Gate structure of metal oxide semiconductor field effect transistor Bing-Yue, Tsui; Chih-Feng, Huang
國立交通大學 2019-04-03T06:43:59Z Gate tunable spin-orbit coupling and weak antilocalization effect in an epitaxial La2/3Sr1/3MnO3 thin film Chiu, Shao-Pin; Yamanouchi, Michihiko; Oyamada, Tatsuro; Ohta, Hiromichi; Lin, Juhn-Jong
臺大學術典藏 2018-09-10T08:18:06Z Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
臺大學術典藏 2018-09-10T07:41:37Z Gate Tunneling Leakage Current Behavior of 40nm PD SOI NMOS Device Considerign the Floating Body Effect H. J. Hung;J. B. Kuo;D. Chen;C. S. Yeh; H. J. Hung; J. B. Kuo; D. Chen; C. S. Yeh; JAMES-B KUO
國立高雄師範大學 2010 Gate voltage swing enhancement of an InGaP/InGaAs pseudomorphic HFET with low-to-high double doping channels Jung-Hui Tsai;Wen-Shiung Lour;Chia-Hua Huang;Sheng-Shiun Ye;Yung-Chun Ma; 蔡榮輝
國立臺灣海洋大學 2010-10-28 Gate voltage swing enhancement of InGaP/ InGaAs pseudomorphic HFET with low-to-high double doping channels J.-H. Tsai; W.-S. Lour; C.-H. Huang; S.-S. Ye; Y.-C. Ma
臺大學術典藏 2018-09-10T07:04:10Z Gate width dependence on backscattering characteristics in the nanoscale strained complementary metal-oxide-semiconductor field-effect transistor Liao, M.H.; Liu, C.W.; Yeh, L.; Lee, T.-L.; Liang, M.-S.; CHEE-WEE LIU
臺大學術典藏 2020-01-13T08:22:40Z Gate width dependence on backscattering characteristics in the nanoscale strained complementary metal-oxide-semiconductor field-effect transistor Liao, M.H.; Liu, C.W.; Yeh, L.; Lee, T.-L.; Liang, M.-S.; MING-HAN LIAO
國立交通大學 2014-12-08T15:36:25Z Gate-all-around floating-gate memory device with triangular poly-Si nanowire channels Tsai, Jung-Ruey; Lee, Ko-Hui; Lin, Horng-Chih; Huang, Tiao-Yuan
臺大學術典藏 2018-09-10T14:58:05Z Gate-all-around Ge FETs Liu, C.W.;Chen, Y.-T.;Hsu, S.-H.; Liu, C.W.; Chen, Y.-T.; Hsu, S.-H.; CHEE-WEE LIU
國立交通大學 2014-12-08T15:11:50Z Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels Su, Chun-Jung; Tsai, Tzu-I; Liou, Yu-Ling; Lin, Zer-Ming; Lin, Horng-Chih; Chao, Tien-Sheng

显示项目 445661-445685 / 2348570 (共93943页)
<< < 17822 17823 17824 17825 17826 17827 17828 17829 17830 17831 > >>
每页显示[10|25|50]项目