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Showing items 397611-397620 of 2349067 (234907 Page(s) Totally) << < 39757 39758 39759 39760 39761 39762 39763 39764 39765 39766 > >> View [10|25|50] records per page
| 國立交通大學 |
2014-12-08T15:43:41Z |
ESD protection under grounded-up bond pads in 0.13 mu m eight-level copper metal, fluorinated silicate glass low-k intermetal dielectric CMOS process technology
|
Chou, KY; Chen, MJ |
| 大葉大學 |
2000 |
ESD robustness designs of power MOSFET ICs
|
陳勝利 |
| 大葉大學 |
2000-11 |
ESD Robustness Designs of Power MOSFET ICs
|
陳勝利 |
| 國立成功大學 |
2024 |
ESD Robustness of Germanium Photodetectors in Advanced Silicon Photonics Technology
|
Chen;S, -H.;Fu;P, -Y.;Tsiara;A;Peer, van de;M;Simicic;M;Musibau;S;Ban;Y;Kao;K, -H.;Chen;W, -C.;Serbulova;K;Campenhout, Van;J;Absil;P;Croes;K |
| 國立交通大學 |
2014-12-08T15:15:20Z |
ESD robustness of thin-film devices with different layout structures in LTPS technology
|
Deng, Chih-Kang; Ker, Ming-Dou |
| 國立交通大學 |
2017-04-21T06:48:20Z |
ESD Self-Protection Design on 2.4-GHz T/R Switch for RF Application in CMOS Process
|
Lin, Chun-Yu; Liu, Rui-Hong; Ker, Ming-Dou |
| 亞洲大學 |
2010-10 |
ESD Simulation on GGNMOS for 40V BCD
|
許健;Sheu, Gene;楊紹明;Yang, Shao-Ming |
| 國立交通大學 |
2014-12-08T15:26:50Z |
ESD test methods on integrated circuits: An overview
|
Ker, MD; Peng, JH; Jiang, HC |
| 國立交通大學 |
2014-12-08T15:23:05Z |
ESD-Aware Circuit Design in CMOS Integrated Circuits to Meet System-Level ESD Specification in Microelectronic Systems
|
Ker, Ming-Dou |
| 國立交通大學 |
2018-08-21T05:57:09Z |
ESD-Induced Latchup-Like Failure in a Touch Panel Control IC
|
Ker, Ming-Dou; Chiu, Po-Yen; Shieh, Wuu-Trong; Wang, Chun-Chi |
Showing items 397611-397620 of 2349067 (234907 Page(s) Totally) << < 39757 39758 39759 39760 39761 39762 39763 39764 39765 39766 > >> View [10|25|50] records per page
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